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      <div class="TdmEntry">Overall Objectives<ul><li><a href="./uid3.html">Introduction</a></li><li><a href="./uid6.html">General Presentation</a></li><li><a href="./uid11.html">Summary of Compsys I Achievements</a></li><li><a href="./uid17.html">Quick View of Compsys II
Achievements and Directions for Compsys III</a></li></ul></div>
      <div class="TdmEntry">Research Program<ul><li><a href="uid21.html&#10;&#9;&#9;  ">Architecture and Compilation Trends</a></li><li><a href="uid36.html&#10;&#9;&#9;  ">Code Analysis, Code Transformations, Code Optimizations</a></li><li><a href="uid39.html&#10;&#9;&#9;  ">Mathematical Tools</a></li></ul></div>
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      <div class="TdmEntry">New Software and Platforms<ul><li><a href="uid57.html&#10;&#9;&#9;  ">Aspic</a></li><li class="tdmActPage"><a href="uid61.html&#10;&#9;&#9;  ">DCC</a></li><li><a href="uid64.html&#10;&#9;&#9;  ">Lattifold</a></li><li><a href="uid67.html&#10;&#9;&#9;  ">OpenOrdo</a></li><li><a href="uid69.html&#10;&#9;&#9;  ">PoCo</a></li><li><a href="uid72.html&#10;&#9;&#9;  ">PolyOrdo</a></li><li><a href="uid74.html&#10;&#9;&#9;  ">PPCG-ParamTiling</a></li><li><a href="uid77.html&#10;&#9;&#9;  ">Termite</a></li><li><a href="uid81.html&#10;&#9;&#9;  ">Vaphor</a></li></ul></div>
      <div class="TdmEntry">New Results<ul><li><a href="uid86.html&#10;&#9;&#9;  ">Studying Optimal Spilling in the Light of SSA</a></li><li><a href="uid87.html&#10;&#9;&#9;  ">Symbolic Range of Pointers in C programs</a></li><li><a href="uid88.html&#10;&#9;&#9;  ">Analyzing C Programs with Arrays</a></li><li><a href="uid89.html&#10;&#9;&#9;  ">Termination of C Programs</a></li><li><a href="uid90.html&#10;&#9;&#9;  ">Data-aware Process Networks</a></li><li><a href="uid91.html&#10;&#9;&#9;  ">Mono-parametric Tiling</a></li><li><a href="uid92.html&#10;&#9;&#9;  ">Exact and Approximated Data-Reuse Optimizations
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Transformation</a></li><li><a href="uid97.html&#10;&#9;&#9;  ">Liveness Analysis in Explicitly-Parallel
Programs</a></li><li><a href="uid98.html&#10;&#9;&#9;  ">Extended Lattice-Based Memory Allocation</a></li><li><a href="uid99.html&#10;&#9;&#9;  ">Stencil Accelerators</a></li><li><a href="uid101.html&#10;&#9;&#9;  ">PolyApps</a></li></ul></div>
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	    2015</a> | <a href="http://www.inria.fr/en/teams/compsys">Presentation of the Project-Team COMPSYS</a> | <a href="http://www.ens-lyon.fr/LIP/COMPSYS/index.html.en">COMPSYS Web Site
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        <h2>Section: 
      New Software and Platforms</h2>
        <h3 class="titre3">DCC</h3>
        <p>DPN C Compiler</p>
        <p class="notaparagraph"><span class="smallcap">Keywords: </span> Polyhedral compilation - Automatic parallelization - High-level synthesis</p>
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          <span class="smallcap">Functional Description </span>
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        <p>Dcc (Data-aware process network C compiler) analyzes a sequential regular
program written in C and generates an equivalent architecture of parallel
computer as a communicating process network (Data-aware Process Network, DPN).
Internal communications (channels) and external communications (external
memory) are automatically handled while fitting optimally the characteristics
of the global memory (latency and throughput). The parallelism can be tuned.
Dcc has been registered at the APP (“Agence de protection des programmes”)
and transferred to the XtremLogic start-up under an Inria license.</p>
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            <p class="notaparagraph"><a name="uid62"> </a>Participants: Christophe Alias and Alexandru Plesco</p>
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            <p class="notaparagraph"><a name="uid63"> </a>Contact: Christophe Alias</p>
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