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    <meta name="dc.creator" content="Liliana Cucu"/>
    <meta name="dc.creator" content="Dumitru Potop-Butucaru"/>
    <meta name="dc.creator" content="Yves Sorel"/>
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        <h2>Section: 
      Research Program</h2>
        <h3 class="titre3">The Algorithm-Architecture Adequation
methodology and Real-Time Scheduling</h3>
        <p class="participants"><span class="part">Participants</span> :
	Liliana Cucu, Dumitru Potop-Butucaru, Yves Sorel.</p>
        <p>The Algorithm-Architecture Adequation (AAA) methodology relies on distributed
real-time schedulability and optimization theories to map efficiently
an algorithm model to an architecture model.</p>
        <p>The algorithm model which describes the functional specifications of the
applications, is an extension of the well known data-flow model from Dennis
<a href="./bibliography.html#aoste2-2017-bid0">[16]</a>. It is a directed acyclic hyper-graph (DAG) that we call
“conditioned factorized data dependence graph”, whose vertices are functions
and hyper-edges are directed “data or control dependences” between
functions. The data dependences define a partial order on the functions
execution. The basic data-flow model was extended in three directions: first
infinite (resp. finite) repetition of a sub-graph pattern in order to specify
the reactive aspect of real-time systems (resp. in order to specify the finite
repetition of a sub-graph consuming different data similar to a loop in
imperative languages), second “state” when data dependences are necessary
between different infinite repetitions of the sub-graph pattern introducing
cycles which must be avoided by introducing specific vertices called “delays”
(similar to z −n in automatic control), third “conditioning” of a function by a
control dependence similar to conditional control structure in imperative
languages, allowing the execution of alternative subgraphs. Delays combined
with conditioning allow the programmer to specify automata necessary for
describing “mode changes”.</p>
        <p>The architecture model which describes the non functional specifications is, in
the simplest case, a directed graph whose vertices are of two types:
“processor” (one sequencer of functions, several sequencers of communications
and distributed or shared memories) and “medium” (multiplexers and
demultiplexers), and whose edges are directed connections. With such model it
is possible to describe classic heterogeneous distributed, parallel and
multiprocessor platforms as well as the most recent multi/manycore
platforms. The worst case times mentioned previously are estimated according to
this model.</p>
        <p>The implementation model is a graph obtained by applying an external composition
law such that an architecture graph operates on an algorithm graph to give an
algorithm graph while taking advantage of timing characteristics, basically
periods, deadlines and WCETs. This resulting algorithm graph is built by
performing spatial and timing allocations (distribution and scheduling) of
algorithm graph functions on architecture graph resources, and of dependences
between functions on communication media. In that context "Adequation" means to
search, in the solution space of implementation graphs, one implementation
graph which verifies real-time constraints and, in addition, minimizes some
criteria. These criteria consists in the total execution time of the algorithm
executed on the architecture, the number of computing or communication
resources, etc. Below, we describe distributed real-time schedulability
analyses and optimization techniques suited for that purposes.</p>
        <p>We address two main issues: uniprocessor and multiprocessor real-time
scheduling for which some real-time constraints are of high criticality,
i.e. they must be satisfied otherwise dramatic consequences occur.</p>
        <p>In the case of uniprocessor real-time scheduling, besides the usual deadline
constraint, often equal to the period of each task, i.e. a function with timing
characteristics, we take into consideration dependences beetween tasks, and
possibly several latencies. The latter are “end-to-end” constraints that may
have complex relationships. Dealing with multiple real-time constraints raises
the complexity of the scheduling problems. Moreover, costs of the Real-Time
Operating System (RTOS) and of preemptions lead to, at least, a waste of
resources due to their approximation in the WCET (Worst Execution Time) of each
task, as proposed by Liu and Layland in their seminal article
<a href="./bibliography.html#aoste2-2017-bid1">[18]</a>. This is the reason why we first studied non-preemptive
real-time scheduling with dependences, periodicities, and latencies
constraints. Although a bad approximation of costs of the RTOS and of
preemptions, may have dramatic consequences on real-time scheduling, there are
only few researches on this topic. Thus, we investigated preemptive real-time
scheduling while taking into account its cost which is very difficult to
determine because it varies according to the instance (job) of each task. This
latter is integrated in the schedulability conditions, and in the corresponding
scheduling algorithms we propose. More generally, we integrate in
schedulability analyses costs of the RTOS and of preemptions.</p>
        <p>In the case of multiprocessor real-time scheduling, we chose to study first the
“partitioned approach”, rather than the “global approach”, since the latter
uses task migrations whose cost is prohibitive for current commercial
processors, even for the more recent many/multicore. The partitioned approach
enables us to reuse the results obtained in the uniprocessor case in order to
derive solutions for the multiprocessor case. We consider also the
semi-partitioned approach which allows only some migrations in order to
minimize their costs. In addition, to satisfy the multiple real-time
constraints mentioned in the uniprocessor case, we have to minimize the total
execution time (makespan) since we deal with automatic control applications
involving feedback loops. The complexity of such minimization problem increases
because the cost of interprocessor communications (through buses in a
multi-processor or routers in a manycore) must be taken into
account. Furthermore, the domain of embedded systems leads to solving
minimization resources problems. Since both optimization problems are NP-hard
we develop exact algorithms (ILP, B &amp; B, B &amp; C) which are optimal for simple
problems, and heuristics which are sub-optimal for realistic problems
corresponding to industrial needs. Long time ago we proposed a very fast
“greedy” heuristics whose results were regularly improved, and extended with
local neighborhood heuristics, or used as initial solutions for metaheuristics.</p>
        <p>Besides the spatial dimension (distributed) of the real-time scheduling
problem, other important dimensions are the type of communication mechanisms
(shared memory vs. message passing), or the source of control and
synchronization (event-driven vs. time-triggered). We explore real-time
scheduling on architectures corresponding to all combinations of the above
dimensions. This is of particular impact in application domains such as
railways and avionics.</p>
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