<?xml version="1.0" encoding="utf-8"?>
<raweb xmlns:xlink="http://www.w3.org/1999/xlink" xml:lang="en" year="2018">
  <identification id="ctrl-a" isproject="true">
    <shortname>CTRL-A</shortname>
    <projectName>Control for safe Autonomic computing systems</projectName>
    <theme-de-recherche>Distributed Systems and middleware</theme-de-recherche>
    <domaine-de-recherche>Networks, Systems and Services, Distributed Computing</domaine-de-recherche>
    <urlTeam>https://team.inria.fr/ctrl-a/</urlTeam>
    <structure_exterieure type="Labs">
      <libelle>Laboratoire d'Informatique de Grenoble (LIG)</libelle>
    </structure_exterieure>
    <structure_exterieure type="Organism">
      <libelle>Institut polytechnique de Grenoble</libelle>
    </structure_exterieure>
    <structure_exterieure type="Organism">
      <libelle>Université de Grenoble Alpes</libelle>
    </structure_exterieure>
    <header_dates_team>Creation of the Team: 2014 January 01, updated into Project-Team: 2017 June 01</header_dates_team>
    <LeTypeProjet>Project-Team</LeTypeProjet>
    <keywordsSdN>
      <term>A1.1.2. - Hardware accelerators (GPGPU, FPGA, etc.)</term>
      <term>A1.1.4. - High performance computing</term>
      <term>A1.1.9. - Fault tolerant systems</term>
      <term>A1.1.10. - Reconfigurable architectures</term>
      <term>A1.3. - Distributed Systems</term>
      <term>A1.3.5. - Cloud</term>
      <term>A1.4. - Ubiquitous Systems</term>
      <term>A2.1.9. - Synchronous languages</term>
      <term>A2.1.10. - Domain-specific languages</term>
      <term>A2.2. - Compilation</term>
      <term>A2.3.1. - Embedded systems</term>
      <term>A2.5.1. - Software Architecture &amp; Design</term>
      <term>A2.5.2. - Component-based Design</term>
      <term>A2.5.4. - Software Maintenance &amp; Evolution</term>
      <term>A2.6.2. - Middleware</term>
      <term>A4.9. - Security supervision</term>
      <term>A4.9.1. - Intrusion detection</term>
      <term>A4.9.3. - Reaction to attacks</term>
      <term>A6.4.2. - Stochastic control</term>
    </keywordsSdN>
    <keywordsSecteurs>
      <term>B4.5. - Energy consumption</term>
      <term>B5.1. - Factory of the future</term>
      <term>B6.1. - Software industry</term>
      <term>B6.1.1. - Software engineering</term>
      <term>B6.1.2. - Software evolution, maintenance</term>
      <term>B6.4. - Internet of things</term>
      <term>B6.5. - Information systems</term>
      <term>B6.6. - Embedded systems</term>
      <term>B8.1. - Smart building/home</term>
    </keywordsSecteurs>
    <UR name="Grenoble"/>
  </identification>
  <team id="uid1">
    <person key="ctrl-a-2018-idp120448">
      <firstname>Eric</firstname>
      <lastname>Rutten</lastname>
      <categoryPro>Chercheur</categoryPro>
      <research-centre>Grenoble</research-centre>
      <moreinfo>Team leader, Inria, Researcher</moreinfo>
      <hdr>oui</hdr>
    </person>
    <person key="ctrl-a-2018-idp123360">
      <firstname>Gwenaël</firstname>
      <lastname>Delaval</lastname>
      <categoryPro>Enseignant</categoryPro>
      <research-centre>Grenoble</research-centre>
      <moreinfo>Univ Grenoble Alpes, Associate Professor</moreinfo>
    </person>
    <person key="ctrl-a-2018-idp125856">
      <firstname>Stéphane</firstname>
      <lastname>Mocanu</lastname>
      <categoryPro>Enseignant</categoryPro>
      <research-centre>Grenoble</research-centre>
      <moreinfo>Grenoble-INP, Associate Professor</moreinfo>
    </person>
    <person key="ctrl-a-2018-idp128336">
      <firstname>Neïl</firstname>
      <lastname>Ayeb</lastname>
      <categoryPro>PhD</categoryPro>
      <research-centre>Grenoble</research-centre>
      <moreinfo>Orange Labs</moreinfo>
    </person>
    <person key="ctrl-a-2018-idp130768">
      <firstname>Adja</firstname>
      <lastname>Sylla</lastname>
      <categoryPro>PhD</categoryPro>
      <research-centre>Grenoble</research-centre>
      <moreinfo>CEA, until Jan. 2018</moreinfo>
    </person>
    <person key="ctrl-a-2018-idp133200">
      <firstname>Soguy Mak Kare</firstname>
      <lastname>Gueye</lastname>
      <categoryPro>Technique</categoryPro>
      <research-centre>Grenoble</research-centre>
      <moreinfo>Inria, Aug. 2018</moreinfo>
    </person>
    <person key="ctrl-a-2018-idp135664">
      <firstname>Agustin</firstname>
      <lastname>Yabo</lastname>
      <categoryPro>Stagiaire</categoryPro>
      <research-centre>Grenoble</research-centre>
      <moreinfo>Univ Grenoble Alpes, from Feb. 2018 until June 2018</moreinfo>
    </person>
    <person key="ctrl-a-2018-idp138160">
      <firstname>Maria Immaculada</firstname>
      <lastname>Presseguer</lastname>
      <categoryPro>Assistant</categoryPro>
      <research-centre>Grenoble</research-centre>
      <moreinfo>Inria</moreinfo>
    </person>
    <person key="ctrl-a-2018-idp140624">
      <firstname>Bogdan</firstname>
      <lastname>Robu</lastname>
      <categoryPro>CollaborateurExterieur</categoryPro>
      <research-centre>Grenoble</research-centre>
      <moreinfo>Univ Grenoble Alpes, Gipsa-lab</moreinfo>
    </person>
    <person key="dionysos-2018-idp197360">
      <firstname>Quang</firstname>
      <lastname>Pham Tran Anh</lastname>
      <categoryPro>PostDoc</categoryPro>
      <research-centre>Grenoble</research-centre>
      <moreinfo>Inria/Nokia, co-advised EPI Dyonisos, Rennes, from May 2018</moreinfo>
    </person>
  </team>
  <presentation id="uid2">
    <bodyTitle>Overall Objectives</bodyTitle>
    <subsection id="uid3" level="1">
      <bodyTitle>Objective: control support for
autonomic computing</bodyTitle>
      <p><span class="smallcap" align="left">Ctrl-A</span> is motivated by today's context
where
computing systems,
large (data centers) or small (embedded),
are more and more required
to be adaptive to the
dynamical fluctuations
of their environments and workloads,
evolutions of their computing infrastructures (shared, or subject to faults),
or
changes in
application
functionalities.
Their administration, traditionally managed by human system administrators,
needs to be
automated
in order to be efficient, safe and responsive.
Autonomic Computing is the approach
that emerged in the early 2000's
in distributed systems
to answer that challenge,
in the form of self-administration control loops.
They address objectives like
self-configuration (e.g. in service-oriented systems),
self-optimization (resource consumption management e.g., energy),
self-healing (fault-tolerance, resilience),
self-protection (security and privacy).</p>
      <p>Therefore, there is a pressing and increasing demand
for methods and tools to design
controllers
for self-adaptive computing systems,
that
ensure quality and safety
of the behavior of the controlled system.
The critical
importance
of the quality of control on
performance and safety in
automated systems,
in computing as elsewhere,
calls for a departure from traditional approaches
relying on <i>ad hoc</i> techniques,
often
empirical, unsafe and application-specific solutions.</p>
      <p>The main objective of the <span class="smallcap" align="left">Ctrl-A</span> project-team is to develop a novel framework for
model-based design of controllers in Autonomic Computing.
We want to contribute
generic
Software Engineering
methods and tools
for developers to design appropriate controllers
for their particular reconfigurable architectures, software or hardware,
and integrate them at middleware level.
We want
to improve
concrete usability
of techniques from Control Theory, particularly Discrete Event Systems,
by specialists of concrete systems (rather than formal models)
<ref xlink:href="#ctrl-a-2018-bid0" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>,
and to provide tool support for our methods in the form of specification languages and compilers.
We address policies for
self-configuration,
self-optimization (resource management, low power),
self-healing (fault tolerance)
and
self-protection (security).</p>
    </subsection>
  </presentation>
  <fondements id="uid4">
    <bodyTitle>Research Program</bodyTitle>
    <subsection id="uid5" level="1">
      <bodyTitle>Modeling and control techniques
for
autonomic computing</bodyTitle>
      <p>The main objective of <span class="smallcap" align="left">Ctrl-A</span> translates into a number of scientific challenges, the most important of these are:</p>
      <simplelist>
        <li id="uid6">
          <p noindent="true">(i)
programming language support,
on the two facets of
model-oriented languages, based on automata
<ref xlink:href="#ctrl-a-2018-bid1" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>,
and
of
domain specific languages,
following
e.g.,
a component-based approach
<ref xlink:href="#ctrl-a-2018-bid2" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>, <ref xlink:href="#ctrl-a-2018-bid3" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>
or
related to rule-based or HMI languages
;</p>
        </li>
        <li id="uid7">
          <p noindent="true">(ii)
design methods for reconfiguration controller design
in computing systems,
proposing generic systems architectures and models
based on transition systems <ref xlink:href="#ctrl-a-2018-bid4" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>, <ref xlink:href="#ctrl-a-2018-bid5" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>,
classical continuous control
or
controlled stochastic systems.</p>
          <p>We adopt a strategy of constant
experimental
identification of needs
and
validation of proposals,
in application domains like
middleware platforms for
Cloud systems
<ref xlink:href="#ctrl-a-2018-bid6" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>,
multi-core HPC architectures
<ref xlink:href="#ctrl-a-2018-bid7" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>,
Dynamic Partial Reconfiguration in FPGA-based hardware
<ref xlink:href="#ctrl-a-2018-bid8" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>
and
the IoT and smart environments
<ref xlink:href="#ctrl-a-2018-bid9" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>.</p>
        </li>
      </simplelist>
      <p>Achieving the goals of <span class="smallcap" align="left">Ctrl-A</span> requires
multidisciplinarity
and
expertise from several domains. The expertise in Autonomic Computing and programming languages is covered
internally
by members of the Ctrl-A team.
On the side of
theoretical aspects of control,
we have active external collaborations
with researchers specialized in Control Theory,
in the domain of Discrete Event Systems
as well as
in classical, continuous control.
Additionally, an important requirement
for our research to have impact
is to have
access to
concrete, real-world computing systems requiring reconfiguration control.
We target autonomic computing at different scales,
in embedded systems or in cloud infrastructures, which are traditionally different domains.
This is addressed by external collaborations,
with experts in either hardware or software platforms, who are generally missing our competences on model-based control of reconfigurations.</p>
    </subsection>
  </fondements>
  <domaine id="uid8">
    <bodyTitle>Application Domains</bodyTitle>
    <subsection id="uid9" level="1">
      <bodyTitle>
Self-adaptive and reconfigurable computing systems in HPC and the IoT</bodyTitle>
      <p>We are attacking the
problem of designing
well-regulated
and efficient self-adaptive
computing systems
by
the development of novel strategies for systems management.</p>
      <p>The kind of systems we typically target
involve
relatively coarse grained computation tasks
(e.g. image processing or HPC tasks, components or services),
assembled in workflows, application dependency graphs, or composites.
At that level, there can be parallel and conditional branches,
as well as
choices that can be made between alternative branches, corresponding to different ways to perform that part of the application.
Such tasks can be achieved following a choice of implementations or versions,
such as in service oriented approaches.
Each implementation has its own
characteristics and requirements, e.g., w.r.t. resources consumed and QoS offered.
The systems execution infrastructures
present
heterogeneity,
with different computing processors,
a variety of peripheral devices (e.g., I/O, video port, accelerators),
and different means of communications.
This hardware or middleware level also presents adaptation potential e.g.,
in varying quantities of resources
or sleep and stand-by modes.</p>
      <p>The kinds of control problems
encountered in these adaptive systems concern the navigation in the
configurations space defined by choice points at the levels of applications, tasks, and architecture.
Upon events or conditions triggering reconfiguration and adaptation,
the controller has to choose a next configuration where,
on the one hand,
all consistency constraints are satisfied w.r.t. dependencies and resources requirements.
On the other hand, it has to apply a policy or strategy
deciding between correct configurations which one to chose e.g.
by optimizing one or more criteria,
or by insuring reachability of some later configuration (goal or fallback).
This targeted class of computing systems we consider is
mid-sized,
in the sense that the combinatorial complexity is large enough for manual solving to be impossible,
while remaining within the range where supervisory control techniques are tractable.
The pace of control is more sporadic, and slower than the instruction-level computation performance within the coarse-grained tasks.</p>
      <p>The objectives of <span class="smallcap" align="left">Ctrl-A</span> will be achieved and evaluated
in both of our main application domains,
thereby exhibiting their similarities from the point of view of reconfiguration control.
A first application domain
is
High Performance Computing.
In this area,
we
currently
focus especially
on the
management of Dynamic Partial Reconfiguration in FPGA based hardware,
at the level of middleware.
Here the particular application we consider
is,
as in our ANR project HPeC starting end of 2015,
video image flow processing for smart cameras
implemented on DPR FPGASs
themselves embedded in drones.</p>
      <p>A
second general application domain
to confront our models is
the Internet of Things (IoT),
more specifically
self-adaptive
middleware platforms
for
Smart Environments,
or
Industry 4.0 related topics, like SCADA.
We focus on providing coordination components and controllers
of
software components and services, or rule-based
middleware platforms.
The adaptation problems concern both
the functional aspects of the applications in a smart building,
and the middleware support deployment and reconfiguration issues.
We are considering perspectives concerning self-protection and security.</p>
    </subsection>
  </domaine>
  <logiciels id="uid10">
    <bodyTitle>New Software and Platforms</bodyTitle>
    <subsection id="uid11" level="1">
      <bodyTitle>Heptagon</bodyTitle>
      <p><span class="smallcap" align="left">Keywords:</span> Compilers - Synchronous Language - Controller synthesis</p>
      <p noindent="true"><span class="smallcap" align="left">Functional Description:</span> Heptagon is an experimental language for the implementation of embedded real-time reactive systems. It is developed inside the Synchronics large-scale initiative, in collaboration with Inria Rhones-Alpes. It is essentially a subset of Lucid Synchrone, without type inference, type polymorphism and higher-order. It is thus a Lustre-like language extended with hierchical automata in a form very close to SCADE 6. The intention for making this new language and compiler is to develop new aggressive optimization techniques for sequential C code and compilation methods for generating parallel code for different platforms. This explains much of the simplifications we have made in order to ease the development of compilation techniques.</p>
      <p>The current version of the compiler includes the following features:
- Inclusion of discrete controller synthesis within the compilation: the language is equipped with a behavioral contract mechanisms, where assumptions can be described, as well as an "enforce" property part. The semantics of this latter is that the property should be enforced by controlling the behaviour of the node equipped with the contract. This property will be enforced by an automatically built controller, which will act on free controllable variables given by the programmer. This extension has been named BZR in previous works.
- Expression and compilation of array values with modular memory optimization. The language allows the expression and operations on arrays (access, modification, iterators). With the use of location annotations, the programmer can avoid unnecessary array copies.</p>
      <simplelist>
        <li id="uid12">
          <p noindent="true">Participants: Adrien Guatto, Brice Gelineau, Cédric Pasteur, Eric Rutten, Gwenaël Delaval, Léonard Gérard and Marc Pouzet</p>
        </li>
        <li id="uid13">
          <p noindent="true">Partners: UGA - ENS Paris - Inria - LIG</p>
        </li>
        <li id="uid14">
          <p noindent="true">Contact: Gwenaël Delaval</p>
        </li>
        <li id="uid15">
          <p noindent="true">URL: <ref xlink:href="http://heptagon.gforge.inria.fr" location="extern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest">http://<allowbreak/>heptagon.<allowbreak/>gforge.<allowbreak/>inria.<allowbreak/>fr</ref></p>
        </li>
      </simplelist>
    </subsection>
  </logiciels>
  <resultats id="uid16">
    <bodyTitle>New Results</bodyTitle>
    <subsection id="uid17" level="1">
      <bodyTitle>Programming support for Autonomic Computing</bodyTitle>
      <subsection id="cid1" level="2">
        <bodyTitle>Reactive languages</bodyTitle>
        <participants>
          <person key="ctrl-a-2018-idp123360">
            <firstname>Gwenaël</firstname>
            <lastname>Delaval</lastname>
          </person>
          <person key="ctrl-a-2018-idp120448">
            <firstname>Eric</firstname>
            <lastname>Rutten</lastname>
          </person>
        </participants>
        <p>Our work in reactive programming
for autonomic computing systems
is focused on the specification and compilation of declarative control objectives,
under the form of contracts,
enforced upon classical mode automata as defined in synchronous languages.
The compilation involves a phase of Discrete Controller Synthesis,
integrating the tool ReaX,
in order to obtain
an imperative executable code.
The programming language Heptagon / BZR
(see Section Software and Platforms)
integrates our research results
<ref xlink:href="#ctrl-a-2018-bid1" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>.</p>
        <p>Recent work concerns
exploring new possibilities offered by logico-numeric control.
We consider
Symbolic Limited Lookahead Control for Best-effort Dynamic Computing Resource Management.
We put forward a new modeling technique for Dynamic Resource Management (DRM) based on discrete events control for symbolic logico-numerical systems, especially Discrete Controller Synthesis (DCS). The resulting models involve state and input variables defined on an infinite domain (Integers), thereby no exact DCS algorithm exists for safety control. We thus formally define the notion of limited lookahead, and associated
best-effort control objectives targeting safety and optimization on a sliding window for a number of steps ahead. We give symbolic algorithms, illustrate our approach on an example model for DRM, and report on performance results based on an implementation in the tool ReaX.
This work is
in cooperation with
the Sumo team at Inria Rennes
(Hervé Marchand)
and
University of Liverpool
(Nicolas Berthier),
and
is published in the
WODES 2018
conference
<ref xlink:href="#ctrl-a-2018-bid10" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>.</p>
        <p>We also have ongoing activities on
abstraction methods for compilation using discrete controller synthesis
(needed for example, in order to program the controllers for systems where the useful data for control can be of arbitrary types (integer, real, ...) , or also for systems which are naturally distributed, and require a decentralized controller)
and
on
compilation and diagnosis for discrete controller synthesis
(which is made special by the declarative nature of the compilation,
where it is
not easy to precisely diagnose cases where no solution can be found).</p>
        <p>On the applicative side,
we also consider such modular and logico-numeric approaches
for
the control of
different targets
in self-adaptive and reconfigurable systems
(see below in Section <ref xlink:href="#uid24" location="intern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/> and <ref xlink:href="#uid21" location="intern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>
<ref xlink:href="#ctrl-a-2018-bid11" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>, <ref xlink:href="#ctrl-a-2018-bid12" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>.</p>
      </subsection>
      <subsection id="cid2" level="2">
        <bodyTitle>Domain-specific languages</bodyTitle>
        <participants>
          <person key="ctrl-a-2018-idp123360">
            <firstname>Gwenaël</firstname>
            <lastname>Delaval</lastname>
          </person>
          <person key="ctrl-a-2018-idp133200">
            <firstname>Soguy Mak Kare</firstname>
            <lastname>Gueye</lastname>
          </person>
          <person key="ctrl-a-2018-idp120448">
            <firstname>Eric</firstname>
            <lastname>Rutten</lastname>
          </person>
        </participants>
        <p>Our work in
Domain-specific languages
(DSLs)
is founded on our work in
component-based programming
for autonomic computing systems
as examplified by e.g., <span class="smallcap" align="left">Fractal</span>.
We
consider essentially the problem of specifying
the control of components assembly reconfiguration,
with an approach based on
the integration within such a component-based framework
of
a
reactive language as in Section <ref xlink:href="#cid1" location="intern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>
<ref xlink:href="#ctrl-a-2018-bid2" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>.</p>
        <p>In recent work,
we proposed
an
extension of
a
classical Software
Architecture Description Languages (ADL)
with Ctrl-F,
DSL for the specification of
dynamic reconfiguration
behavior
in a
<ref xlink:href="#ctrl-a-2018-bid3" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>.</p>
        <p>Based on this experience,
we are working on a proposal for a
DSL
called Ctrl-DPR, allowing designers to easily generate Autonomic Managers
for DPR FPGA systems
(see Section
<ref xlink:href="#uid21" location="intern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>).
Users can describe their system and their management strategies, in terms of the entities composing the system : tasks, versions, applications, ressources, policies. The DSL relies on a behavioral modeling of these entities, targeted at the design of autonomic managers to control the reconfigurations in such a way as to enforce given policies and strategies.
These model-based control techniques are embedded in a compiler, connected to the reactive language and discrete controller synthesis tool of Section <ref xlink:href="#cid1" location="intern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>, which enables to generate a C implementation of the controller enforcing the management strategies. We apply our DSL for the management of a video application on a UAV.
This work is
in cooperation with
LabSticc in Lorient
(Jean-Philippe Diguet),
and
is published in the
ICAC 2018
conference
<ref xlink:href="#ctrl-a-2018-bid13" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>.</p>
        <p>Ongoing work
involves
a
generalization
from our experiences in
software components,
DPR FPGA,
as well as
Rule-based autonomic manager
as in Section <ref xlink:href="#cid3" location="intern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>.
As we observed a similarity in objects and structures
(e.g., tasks, implmentation versions, resources, and
upper-level application layer),
we are considering a more general DSL,
which could be specialized towards such different target domains,
and
where
the compilation towards reactive models could be studied and improved,
especially considering the features of Section <ref xlink:href="#cid1" location="intern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>.
This direction will also lead us to
study the definition of
architectural patterns
for multiple loop
Autonomic Managers,
particularly
hierarchical,
with lower layers autonomy
alleviating management burden from the upper layers.</p>
      </subsection>
      <subsection id="cid3" level="2">
        <bodyTitle>Rule-based systems</bodyTitle>
        <participants>
          <person key="ctrl-a-2018-idp130768">
            <firstname>Adja</firstname>
            <lastname>Sylla</lastname>
          </person>
          <person key="ctrl-a-2018-idp123360">
            <firstname>Gwenaël</firstname>
            <lastname>Delaval</lastname>
          </person>
          <person key="ctrl-a-2018-idp120448">
            <firstname>Eric</firstname>
            <lastname>Rutten</lastname>
          </person>
        </participants>
        <p>This work concerns
a high-level language for safe rule-based programming
in the LINC transactional rule-based platform
developed at CEA
<ref xlink:href="#ctrl-a-2018-bid14" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>.
Rule based middlewares such as LINC enable high level programming of distributed adaptive systems behaviours. LINC also provides the systems with transactional guarantees and hence ensures their reliability at runtime. However, the set of rules may contain design errors (e.g. conflicts, violations of constraints) that can bring the system in unsafe safe or undesirables states, despite the guarantees provided by LINC. On the other hand, automata based languages such as Heptagon/BZR enable formal verification and especially synthesis of discrete controllers to deal with design errors. Our work studies these two languages and combines their execution mechanisms, from a technical perspective.
We target
applications to
the domain of
Internet of Things
and more particularly
smart building, office or home
(see Section <ref xlink:href="#uid24" location="intern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>).</p>
        <p>This work is in cooperation with
CEA LETI/DACLE
(Maxime Louvel),
it
was
the topic of the
PhD of
Adja Sylla at CEA,
co-advised with M. Louvel,
and
aspects on
applications of logico-numeric control
are published in the
CCTA 2018 conference
<ref xlink:href="#ctrl-a-2018-bid11" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>.</p>
      </subsection>
    </subsection>
    <subsection id="uid18" level="1">
      <bodyTitle>Design methods for reconfiguration controller design in computing systems</bodyTitle>
      <p>We apply the results of the previous axes of the team's activity,
as well as other control techniques,
to a range of infrastructures of different natures,
but sharing a transversal problem of reconfiguration control design.
From this very diversity of validations and experiences,
we draw a
synthesis of the whole approach,
towards a general view of
Feedback Control as MAPE-K loop in Autonomic Computing
<ref xlink:href="#ctrl-a-2018-bid15" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>
<ref xlink:href="#ctrl-a-2018-bid0" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>.</p>
      <subsection id="cid4" level="2">
        <bodyTitle>High-Performance Computing</bodyTitle>
        <participants>
          <person key="ctrl-a-2018-idp135664">
            <firstname>Agustin</firstname>
            <lastname>Yabo</lastname>
          </person>
          <person key="ctrl-a-2018-idp133200">
            <firstname>Soguy Mak Kare</firstname>
            <lastname>Gueye</lastname>
          </person>
          <person key="ctrl-a-2018-idp123360">
            <firstname>Gwenaël</firstname>
            <lastname>Delaval</lastname>
          </person>
          <person key="ctrl-a-2018-idp125856">
            <firstname>Stéphane</firstname>
            <lastname>Mocanu</lastname>
          </person>
          <person key="ctrl-a-2018-idp140624">
            <firstname>Bogdan</firstname>
            <lastname>Robu</lastname>
          </person>
          <person key="ctrl-a-2018-idp120448">
            <firstname>Eric</firstname>
            <lastname>Rutten</lastname>
          </person>
        </participants>
        <subsection id="uid19" level="3">
          <bodyTitle>
Automated regulation
and
software transactional memory
</bodyTitle>
          <p>A parallel program needs to manage the trade-off between the time spent in synchronisation and computation. This trade-off is significantly affected by its parallelism degree. A high parallelism degree may decrease computing time while increasing synchronisation cost.
We
performed
work on dynamic control of thread parallelism and mapping.
We address concurrency issues via Software Transactional Memory (STM).
We implement feedback control loops to automate management of threads and diminish program execution time.</p>
          <p>This work was
performed in the framework on the PhD of Naweiluo Zhou,
and
published in the
journal on
Concurrency and Computation: Practice and Experience
<ref xlink:href="#ctrl-a-2018-bid16" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>.</p>
        </subsection>
        <subsection id="uid20" level="3">
          <bodyTitle>A Control-Theory based approach to minimize cluster underuse</bodyTitle>
          <p>HPC systems are facing more and more variability in their behavior, related to e.g., performance and power consumption, and the fact that they are less predictable requires more runtime management.
One such problem is found in the context of CiGri, a simple, lightweight, scalable and fault tolerant grid system which exploits the unused resources of a set of computing clusters.
This work
resulted in
first results addressing the problem of automated resource management in an HPC infrastructure, using techniques from Control Theory to design a controller that maximizes cluster utilization while avoiding overload. We put in place a mechanism for feedback (Proportional Integral, PI) control system software, through a maximum number of jobs to be sent to the cluster, in response to system information about the current number of jobs processed.
Additionally, we developed a Model-Predictive Controller to improve the performance of the system.</p>
          <p>This work is
done in
cooperation with the Datamove team of Inria/LIG,
and Gipsa-lab.
It was the topic of the
Master's thesis of
Agustin Yabo
<ref xlink:href="#ctrl-a-2018-bid17" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>.
Preliminary results were published
in the
AIScience workshop (Autonomous Infrastructure for Science)
of the HPDC
conference
<ref xlink:href="#ctrl-a-2018-bid18" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>.</p>
        </subsection>
        <subsection id="uid21" level="3">
          <bodyTitle>Reconfiguration control in DPR FPGA</bodyTitle>
          <subsection id="uid22" level="4">
            <bodyTitle>DPR FPGA and discrete control for reconfiguration</bodyTitle>
            <p>Implementing self-adaptive embedded systems, such as UAV drones, involves an offline provisioning of the several implementations of the embedded functionalities with different characteristics in resource usage and performance in order for the system to dynamically adapt itself under uncertainties.
We propose an autonomic control architecture for self-adaptive and
self-reconfigurable FPGA-based embedded systems.
The control architecture is structured in three layers: a mission manager, a reconfiguration manager and a scheduling manager.
In this work we focus on the design of the reconfiguration manager.
We propose a design approach using automata-based discrete control.
It involves reactive programming that provides formal semantics, and discrete controller synthesis from declarative objectives.</p>
            <p>This work is
in the framework of the ANR project HPeC
(see Section <ref xlink:href="#uid33" location="intern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>),
and
is published in the
International Workshop on High Performance and Dynamic Reconfigurable Systems and Networks (DRSN 2018), part of the
HPCS 2018
conference
<ref xlink:href="#ctrl-a-2018-bid19" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>
;
for the evaluation of the apllication of logico-numeric control,
in the
CCTA 18
conference
<ref xlink:href="#ctrl-a-2018-bid12" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>
;
for the proposal of a Domain Specific Language,
in the
ICAC 2018
conference
<ref xlink:href="#ctrl-a-2018-bid13" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>.</p>
          </subsection>
          <subsection id="uid23" level="4">
            <bodyTitle>Mission management
and stochastic control
</bodyTitle>
            <p>In the Mission Management workpackage of the ANR project HPeC,
a concurrent control methodology is constructed for the optimal mission planning of a U.A.V. in stochastic environnement.
The control approach is based on parallel ressource sharing Partially Observable Markov Decision Processes modeling of the mission.
The parallel POMDP are reduced to discrete Markov Decision Models using Bayesian Networks evidence for state identification.
The control synthesis is an iterative two step procedure :
first MDP are solved for the optimisation of a finite horizon cost problem
;
then the possible ressource conflicts between parallel actions are solved
either by a priority policy or by a QoS degradation of actions,
e.g.,
like using a lower resolution version of the image processing task
if the ressource availability is critical.</p>
            <p>This work was
performed in the framework on the PhD of Chabha Hireche,
and
published in the
journal on
Sensors
<ref xlink:href="#ctrl-a-2018-bid20" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>, <ref xlink:href="#ctrl-a-2018-bid21" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>.</p>
          </subsection>
        </subsection>
      </subsection>
      <subsection id="cid5" level="2">
        <bodyTitle>IoT</bodyTitle>
        <participants>
          <person key="ctrl-a-2018-idp128336">
            <firstname>Neïl</firstname>
            <lastname>Ayeb</lastname>
          </person>
          <person key="ctrl-a-2018-idp130768">
            <firstname>Adja</firstname>
            <lastname>Sylla</lastname>
          </person>
          <person key="ctrl-a-2018-idp123360">
            <firstname>Gwenaël</firstname>
            <lastname>Delaval</lastname>
          </person>
          <person key="ctrl-a-2018-idp125856">
            <firstname>Stéphane</firstname>
            <lastname>Mocanu</lastname>
          </person>
          <person key="ctrl-a-2018-idp120448">
            <firstname>Eric</firstname>
            <lastname>Rutten</lastname>
          </person>
        </participants>
        <subsection id="uid24" level="3">
          <bodyTitle>Control of smart buildings</bodyTitle>
          <p>A smart environment is equipped with numerous devices (i.e., sensors, actuators) that are possibly distributed over different locations (e.g., rooms of a smart building). These devices are automatically controlled to achieve different objectives related, for instance, to comfort, security and energy savings.
Our work proposes a design framework
based on the combination of the rule based middleware LINC and the automata based language Heptagon/BZR (H/BZR). It consists of: an abstraction layer for the heterogeneity of devices, a transactional execution mechanism to avoid inconsistencies and a controller that, based on a generic model of the environment, makes appropriate decisions and avoids conflicts. A case study with concrete devices, in the field of building automation, is presented to illustrate the framework.</p>
          <p>This work is
in the framework of the cooperation with CEA
(see Section <ref xlink:href="#uid28" location="intern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>),
and
is published in the
CCTA 2018
conference
<ref xlink:href="#ctrl-a-2018-bid11" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>.</p>
        </subsection>
        <subsection id="uid25" level="3">
          <bodyTitle>Device management</bodyTitle>
          <p>The research topic
is targeting
an adaptative and decentralized management for the IoT.
It will contribute
design methods for processes in virtualized gateways in order to enhance IoT infrastructures.
More precisely, it concerns Device Management
in the case of large numbers of connected sensors and actuators,
as can be found in Smart Home and Building, Smart Electricity grids, and industrial frameworks as in Industry 4.0.</p>
          <p>This work is
in the framework of the Inria/Orange labs joint laboratory
(see Section <ref xlink:href="#cid6" location="intern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>),
and
supported by the CIFRE PhD thesis grant of
Neïl Ayeb,
starting dec. 2017.</p>
        </subsection>
        <subsection id="uid26" level="3">
          <bodyTitle>Security in SCADA industrial systems</bodyTitle>
          <p>We focus mainly on vulnerability search, automatic attack vectors synthesis and intrusion detection.
Model checking techniques are used for vulnerability search and automatic attack vectors construction.
Intrusion detection is mainly based on process-oriented detection with a technical approach from run-time monitoring.
The LTL formalism is used to express safety properties which are mined on an attack-free dataset.
The resulting monitors are used for fast intrusion detections.</p>
          <p>A demonstrator of attack/defense scenario in SCADA systems will be built on the existing G-ICS lab (hosted by ENSE3/Grenoble-INP).</p>
          <p>This work is
in the framework of the ANR project Sacade
on
cybersecurity of industrial systems
(see Section <ref xlink:href="#uid34" location="intern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>)
<ref xlink:href="#ctrl-a-2018-bid22" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>
<ref xlink:href="#ctrl-a-2018-bid23" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>
<ref xlink:href="#ctrl-a-2018-bid24" location="biblio" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>.</p>
          <p>The work is also supported by Grenoble Alpes Cybersecurity Institute
(see Section <ref xlink:href="#cid8" location="intern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>).</p>
          <p>Ongoing work concerns
the complementary topic of
analysis and identification of reaction mechanisms for self-protection in cybersecurity,
where,
beyond classical
defense mechanisms that detect intrusions and attacks
or assess the kind of danger that is caused by them,
we explore
models and control techniques for the automated reaction to attacks, in order to use detection information to take the appropriate defense and repair actions.</p>
        </subsection>
      </subsection>
    </subsection>
  </resultats>
  <contrats id="uid27">
    <bodyTitle>Bilateral Contracts and Grants with Industry</bodyTitle>
    <subsection id="uid28" level="1">
      <bodyTitle>Bilateral Contracts with Industry</bodyTitle>
      <p>Our cooperation with CEA
(an EPIC, industrial and commercial public institution)
concerns the
LETI/LIST DACLE laboratory
at Grenoble Minatec;
it is bilateral,
involving the CEA PhD grant of Adja Sylla
(finished end of january 2018),
to work with F. Pacull and M. Louvel on
high-level programming on top of a rule-based middleware
(See Sections <ref xlink:href="#cid3" location="intern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/> and <ref xlink:href="#uid24" location="intern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>).</p>
    </subsection>
    <subsection id="uid29" level="1">
      <bodyTitle>Bilateral Grants with Industry</bodyTitle>
      <subsection id="cid6" level="2">
        <bodyTitle>Orange</bodyTitle>
        <p>We have a cooperation with
Orange labs,
around a
CIFRE PhD grant,
on the topic of
autonomic
device management
(see Section <ref xlink:href="#uid25" location="intern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest"/>).
This activity is
part of the Inria/Orange joint laboratory.</p>
      </subsection>
      <subsection id="cid7" level="2">
        <bodyTitle>Nokia / Bell labs</bodyTitle>
        <p>We are starting a
research action
with Nokia / Bell labs,
around a
post-doctorate,
co-advised with project-team Dyonisos
at Inria Rennes,
on the topic of
the
integration of FPGA-based accelerators in network nodes,
and their reconfiguration management
in coordination with higher level Software Defined Networks management.
This activity is
part of the Inria/ Nokia / Bell labs joint laboratory,
and is in cooperation with the
Dyonisos EPI
at
Inria Rennes Bretagne Atlantique
(Yassine Hadjhadj),
and the post-doctorate topic of
Quang Pham Tran Anh.</p>
      </subsection>
    </subsection>
  </contrats>
  <partenariat id="uid30">
    <bodyTitle>Partnerships and Cooperations</bodyTitle>
    <subsection id="uid31" level="1">
      <bodyTitle>Regional Initiatives</bodyTitle>
      <subsection id="cid8" level="2">
        <bodyTitle> Grenoble Alpes Cybersecurity Institute Cross-Disciplinary Project of the Idex</bodyTitle>
        <p>The Grenoble Alpes Cybersecurity Institute aims at undertaking ground-breaking interdisciplinary research in order to address cybersecurity and privacy challenges. Our main technical focus is on low-cost secure elements, critical infrastructures, vulnerability analysis and validation of large systems, including practical resilience across the industry and the society.</p>
        <p>In Ctrl-A, it is funding an internship position followed by a PhD position to be provided in September 2019 and supervised by Stephane Mocanu.</p>
      </subsection>
    </subsection>
    <subsection id="uid32" level="1">
      <bodyTitle>National Initiatives</bodyTitle>
      <subsection id="uid33" level="2">
        <bodyTitle>ANR HPeC</bodyTitle>
        <p><i>HPeC</i>
is an ANR project on
Self-Adaptive, Energy Efficient High Performance Embedded Computing,
with a UAV case study
(<ref xlink:href="http://hpec.fr/" location="extern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest">http://<allowbreak/>hpec.<allowbreak/>fr/</ref>).
The
Coordinator is
Lab-STICC / MOCS (Lorient / Brest),
and the
duration: 42 month
from october 2015.
Others Partners are:
UBO,
U. Clermont-Ferrand,
InPixal.</p>
        <p>In Ctrl-A,
it is funding a post-doc position, hired in Grenoble
and co-advised with Lorient
:
Soguy Gueye.
The work will be continued with a
post-doc hired in Lorient :
Erwan Moreac.
A PhD based in Brest,
Chabha Hireche, is co-advised by Stéphane Mocanu.</p>
      </subsection>
      <subsection id="uid34" level="2">
        <bodyTitle>ANR Sacade</bodyTitle>
        <p>The
ANR ASTRID Sacade project
is funded by DGA.
Stéphane Mocanu is in charge of several workpackages including a demonstrator.
An expert engineer position is funded for the implementation of attack/defense scenarios in SCADA.</p>
      </subsection>
      <subsection id="uid35" level="2">
        <bodyTitle>Informal National Partners</bodyTitle>
        <p>We have contacts with colleagues in France,
in addition to the cooperation mentioned before,
and
with whom we are
submitting collaboration projects,
co-organizing events and workshops,
etc.
They feature :
Avalon Inria team in Lyon (Ch. Perez, L. Lefevre, E. Caron),
LIP6 (J. Malenfant),
Scales Inria team in Sophia-Antipolis (L. Henrio),
LIRRM in Montpellier (A. Gamatié, K. Godary, D. Simon),
IRISA/Inria Rennes (J. Buisson, J.L. Pazat, ...),
Telecom Paris-Tech (A. Diaconescu, E. Najm),
LAAS (Thierry Monteil),
LURPA ENS Cachan (J.M. Faure, J.J. Lesage).</p>
      </subsection>
      <subsection id="uid36" level="2">
        <bodyTitle>Informal National Industrial Partners</bodyTitle>
        <p>We have ongoing discussions with several industrial actors in our application domains, some of them in the framework of cooperation contracts, other more informal:
Eolas/Business decision (G. Dulac, I. Saffiedine),
ST Microelectronics (V. Bertin),
Schneider Electric (C. El-Kaed, P. Nappey, M. Pitel).</p>
      </subsection>
    </subsection>
    <subsection id="uid37" level="1">
      <bodyTitle>International Initiatives</bodyTitle>
      <subsection id="uid38" level="2">
        <bodyTitle>Inria International Labs</bodyTitle>
        <p>We participate in the jLESC,
Joint Laboratory for Extreme Scale Computing,
with
partners Inria, the University of Illinois, Argonne National Laboratory, Barcelona Supercomputing Center, Jülich Supercomputing Centre and RIKEN AICS.</p>
        <p>We
participated to the 7th Workshop of the JLESC
at Urbana-Champain in July 2017.</p>
        <p>We started a cooperation
with Argonne National Labs,
on Improving the performance and energy efficiency of HPC applications using autonomic computing techniques.</p>
        <p>
          <ref xlink:href="https://jlesc.github.io/projects/energy_autonomic/" location="extern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest">https://<allowbreak/>jlesc.<allowbreak/>github.<allowbreak/>io/<allowbreak/>projects/<allowbreak/>energy_autonomic/</ref>
        </p>
        <p>We are also exploring possibilities on the topic of
integrating FPGAs in HPC grids,
with a participation in a workshop at FPT 18.</p>
        <p>
          <ref xlink:href="https://collab.cels.anl.gov/display/HPCFPGA/HPC-FPGA" location="extern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest">https://<allowbreak/>collab.<allowbreak/>cels.<allowbreak/>anl.<allowbreak/>gov/<allowbreak/>display/<allowbreak/>HPCFPGA/<allowbreak/>HPC-FPGA</ref>
        </p>
      </subsection>
      <subsection id="uid39" level="2">
        <bodyTitle>Inria International Partners</bodyTitle>
        <subsection id="uid40" level="3">
          <bodyTitle>Informal International Partners</bodyTitle>
          <p>We have ongoing relations with international colleagues
in the emerging community on our topic of control for computing
e.g.,
in Sweden
at
Lund
(K.E. Arzen, M. Maggio),
Mälardalen (A. Papadopoulos)
and Linnaeus Universities
(D. Weyns, N. Khakpour),
in the Netherlands
at CWI/leiden University
(F. Arbab),
in the U.K.
at Liverpool U.
(N. Berthier),
in China
at
Heifei University (Xin An),
in Italy
at University
Milano
(C. Ghezzi, A. Leva),
in the USA
at
Ann Arbor University
(S. Lafortune)
and
UMass
(P. Shenoy, E. Cecchet).</p>
        </subsection>
      </subsection>
    </subsection>
  </partenariat>
  <diffusion id="uid41">
    <bodyTitle>Dissemination</bodyTitle>
    <subsection id="uid42" level="1">
      <bodyTitle>Promoting Scientific Activities</bodyTitle>
      <subsection id="uid43" level="2">
        <bodyTitle>Scientific Events Organisation</bodyTitle>
        <subsection id="uid44" level="3">
          <bodyTitle>Member of the Organizing Committees</bodyTitle>
          <p>Eric Rutten is co-chairing,
with Bogdan Robu (Gipsa-lab),
the
40th Summer School of Automatic Control, Grenoble,
September 2019,
on the
special topic of Control for Computing Systems.</p>
        </subsection>
      </subsection>
      <subsection id="uid45" level="2">
        <bodyTitle>Scientific Events Selection</bodyTitle>
        <subsection id="uid46" level="3">
          <bodyTitle>Chair of Conference Program Committees</bodyTitle>
          <p>Eric Rutten is
co-chair,
with A. Filieri (Imp. Coll. UK),
of the
International Workshop on Autonomic High Performance Computing,(AHPC 2018)
(<ref xlink:href="http://hpcs2018.cisedu.info/2-conference/workshops---hpcs2018/workshop09-ahpc" location="extern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest">http://<allowbreak/>hpcs2018.<allowbreak/>cisedu.<allowbreak/>info/<allowbreak/>2-conference/<allowbreak/>workshops---hpcs2018/<allowbreak/>workshop09-ahpc</ref>)
part of The International Conference on High Performance Computing &amp; Simulation (HPCS 2018), July 16 - 20, 2018,Orléans, France
(<ref xlink:href="http://hpcs2018.cisedu.info/" location="extern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest">http://<allowbreak/>hpcs2018.<allowbreak/>cisedu.<allowbreak/>info/</ref>)</p>
        </subsection>
        <subsection id="uid47" level="3">
          <bodyTitle>Member of the Conference Program Committees</bodyTitle>
          <p>Eric Rutten is
PC member
for :</p>
          <simplelist>
            <li id="uid48">
              <p noindent="true">international conferences</p>
              <simplelist>
                <li id="uid49">
                  <p noindent="true">ICAC 2018 (15th IEEE International Conference on Autonomic Computing), Sept 3-7, 2018, Trento, Italy
(<ref xlink:href="http://icac2018.informatik.uni-wuerzburg.de/" location="extern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest">http://<allowbreak/>icac2018.<allowbreak/>informatik.<allowbreak/>uni-wuerzburg.<allowbreak/>de/</ref>)</p>
                </li>
                <li id="uid50">
                  <p noindent="true">(Associate Editor)
2nd IEEE Conference on Control Technology and Applications, CCTA 18, Copenhagen, Denmark, August 21-24, 2018
(<ref xlink:href="http://ccta2018.ieeecss.org/" location="extern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest">http://<allowbreak/>ccta2018.<allowbreak/>ieeecss.<allowbreak/>org/</ref>)</p>
                </li>
                <li id="uid51">
                  <p noindent="true">14th Workshop on Discrete Event Systems, WODES'18, Sorrento Coast, Italy, May 30 - June 1, 2018.
(<ref xlink:href="http://wodes2018.unisa.it/" location="extern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest">http://<allowbreak/>wodes2018.<allowbreak/>unisa.<allowbreak/>it/</ref>)</p>
                </li>
                <li id="uid52">
                  <p noindent="true">AI-Science'18, workshop on autonomic cyberinfrastructure for science,
in conjunction with the ACM HPDC 2018, Tempe, AZ, United States, June 11, 2018
(<ref xlink:href="http://www.hpdc.org/2018/" location="extern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest">http://<allowbreak/>www.<allowbreak/>hpdc.<allowbreak/>org/<allowbreak/>2018/</ref>)</p>
                </li>
                <li id="uid53">
                  <p noindent="true">16th High Performance Computing &amp; Simulation Conference (HPCS 2018). July 16 ? 20, 2018,Orléans, France
(<ref xlink:href="http://hpcs2018.cisedu.info/" location="extern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest">http://<allowbreak/>hpcs2018.<allowbreak/>cisedu.<allowbreak/>info/</ref>)</p>
                </li>
                <li id="uid54">
                  <p noindent="true">UCC Cloud Challenge event in conjunction with IEEE/ACM UCC/BDCAT 2018 in Zurich</p>
                  <p>(<ref xlink:href="http://events.cbmi.htw-berlin.de/ucc18-cloudChallenge/index.html" location="extern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest">http://<allowbreak/>events.<allowbreak/>cbmi.<allowbreak/>htw-berlin.<allowbreak/>de/<allowbreak/>ucc18-cloudChallenge/<allowbreak/>index.<allowbreak/>html</ref>)</p>
                </li>
                <li id="uid55">
                  <p noindent="true">ICAC 2019 (16th IEEE International Conference on Autonomic Computing),
Umeøa, Sweden, June 16 ? 20, 2 019
(<ref xlink:href="http://icac2019.cs.umu.se" location="extern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest">http://<allowbreak/>icac2019.<allowbreak/>cs.<allowbreak/>umu.<allowbreak/>se</ref>)</p>
                </li>
              </simplelist>
            </li>
          </simplelist>
        </subsection>
        <subsection id="uid56" level="3">
          <bodyTitle>Reviewer</bodyTitle>
          <p>Eric Rutten
is
reviewer for
SafeProcess 18
and
CDC 18.</p>
          <p>Stéphane Mocanu is
reviewer for
WODES'18.</p>
        </subsection>
      </subsection>
      <subsection id="uid57" level="2">
        <bodyTitle>Journal</bodyTitle>
        <subsection id="uid58" level="3">
          <bodyTitle>Reviewer - Reviewing Activities</bodyTitle>
          <p>Eric Rutten
is
reviewer for</p>
          <simplelist>
            <li id="uid59">
              <p noindent="true">Science of Computer Programming</p>
            </li>
            <li id="uid60">
              <p noindent="true">IEEE TSC Transactions on Services Computing</p>
            </li>
            <li id="uid61">
              <p noindent="true">IEEE Transactions on Industrial Informatics</p>
            </li>
          </simplelist>
        </subsection>
      </subsection>
      <subsection id="uid62" level="2">
        <bodyTitle>Invited Talks</bodyTitle>
        <p>Eric Rutten
was
invited to give a talk
at :</p>
        <simplelist>
          <li id="uid63">
            <p noindent="true">FETCH 2018, Ecole d'Hiver francophone sur la technologie de conception des systèmes embarqués hétérogènes, 24-26 Janvier 2018, Saint Malo
<ref xlink:href="http://fetch-conference.org" location="extern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest">http://<allowbreak/>fetch-conference.<allowbreak/>org</ref></p>
          </li>
          <li id="uid64">
            <p noindent="true">with J.Ph. Diguet,
:
WRC: 12th Workshop on Reconfigurable Computing
at HiPeac 2018,
<ref xlink:href="https://www.hipeac.net/2018/manchester/#/schedule/" location="extern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest">https://<allowbreak/>www.<allowbreak/>hipeac.<allowbreak/>net/<allowbreak/>2018/<allowbreak/>manchester/<allowbreak/>#/<allowbreak/>schedule/</ref>
Jan. 24, Manchester U.K.</p>
          </li>
          <li id="uid65">
            <p noindent="true">International Workshop on High Performance and Dynamic Reconfigurable Systems and Networks (DRSN 2018)
part of The International Conference on High Performance Computing &amp; Simulation (HPCS 2018), July 16 ? 20, 2018, Orléans, France
<ref xlink:href="http://hpcs2018.cisedu.info/" location="extern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest">http://<allowbreak/>hpcs2018.<allowbreak/>cisedu.<allowbreak/>info/</ref></p>
          </li>
          <li id="uid66">
            <p noindent="true">FETCH 2019, Ecole d'Hiver francophone sur la technologie de conception des systèmes embarqués hétérogènes, Louvain-la-Neuve, Belgique, 28-30 janvier 2019
<ref xlink:href="http://fetch-conference.org" location="extern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest">http://<allowbreak/>fetch-conference.<allowbreak/>org</ref></p>
          </li>
        </simplelist>
      </subsection>
      <subsection id="uid67" level="2">
        <bodyTitle>Leadership within the Scientific Community</bodyTitle>
        <p>Eric Rutten is
co-chair
of the
Technical Committee on Discrete Event Systems (DESTC),
a part of the IEEE Control Systems Society (CSS) Technical Activities Board
(<ref xlink:href="http://discrete-event-systems.ieeecss.org/tc-discrete/home" location="extern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest">http://<allowbreak/>discrete-event-systems.<allowbreak/>ieeecss.<allowbreak/>org/<allowbreak/>tc-discrete/<allowbreak/>home</ref>)
;
and member of the
IFAC Technical Committee 1.3 on Discrete Event and Hybrid Systems,
for the 2017-2020 triennum
(<ref xlink:href="http://tc.ifac-control.org/1/3" location="extern" xlink:type="simple" xlink:show="replace" xlink:actuate="onRequest">http://<allowbreak/>tc.<allowbreak/>ifac-control.<allowbreak/>org/<allowbreak/>1/<allowbreak/>3</ref>).</p>
      </subsection>
      <subsection id="uid68" level="2">
        <bodyTitle>Research Administration</bodyTitle>
        <p>Eric Rutten is member of the LIG laboratory council,
and in charge of scientific relations between Inria Grenoble Rhône-Alpes and CEA Tech.</p>
      </subsection>
    </subsection>
    <subsection id="uid69" level="1">
      <bodyTitle>Teaching - Supervision - Juries</bodyTitle>
      <subsection id="uid70" level="2">
        <bodyTitle>Teaching</bodyTitle>
        <sanspuceslist>
          <li id="uid71">
            <p noindent="true">Licence : G. Delaval, Algorithmics and imperative programming, 18h class, 18h lab, L2, Université Grenoble Alpes</p>
          </li>
          <li id="uid72">
            <p noindent="true">Licence : G. Delaval, Basis of software development : modularity, tests, 15h class, 15h lab, L2, Université Grenoble Alpes</p>
          </li>
          <li id="uid73">
            <p noindent="true">Master : G. Delaval, Programming languages and compiler design, 33h, M1, Université Grenoble Alpes</p>
          </li>
          <li id="uid74">
            <p noindent="true">Master :
S. Mocanu,
Computer Networks and Cybersecurity,
16h class, 34h lab,
M1,
Grenoble-INP/ENSE3</p>
          </li>
          <li id="uid75">
            <p noindent="true">Master :
S. Mocanu,
Industriel Computer Networks,
8h class, 8h lab, niveau (M1, M2),
M2,
Grenoble-INP/ENSE3</p>
          </li>
          <li id="uid76">
            <p noindent="true">Master :
S. Mocanu,
Reliability,
10h class, 8h lab,
M2,
Grenoble-INP/ENSE3</p>
          </li>
          <li id="uid77">
            <p noindent="true">Master : S. Mocanu, Intrusion Detection and Defense in Depth labs, niveau M2, Grenoble-ENSE3/ENSIMAG</p>
          </li>
        </sanspuceslist>
      </subsection>
      <subsection id="uid78" level="2">
        <bodyTitle>Supervision</bodyTitle>
        <simplelist>
          <li id="uid79">
            <p noindent="true">PhD :
Oualid Koucham
;
Détection d'intrusions dans les systèmes de contrôle industriels
;
12 nov. 2018
;
co-advised by
S. Mocanu
with
J-M Thiriet (Gipsa-lab).</p>
          </li>
          <li id="uid80">
            <p noindent="true">PhD in progress :
Chabha Hireche
;
Etude et implémentation d’une approche probabiliste de contrôle de mission de drone autonome
;
oct. 2015
;
co-advised by
S. Mocanu
with Catherine Dezan (U. Bretagne Occidentale),
and Jean-Philippe Diguet (U. Bretagne Sud).</p>
          </li>
          <li id="uid81">
            <p noindent="true">PhD in progress :
Neïl Ayeb
;
Vers un management des objets de l'IoT
décentralisé et adaptable
;
dec. 2017
;
co-advised by
Eric Rutten
with
S. Bolle, T. Coupaye (Orange labs).</p>
          </li>
        </simplelist>
      </subsection>
    </subsection>
    <subsection id="uid82" level="1">
      <bodyTitle>Popularization</bodyTitle>
      <subsection id="uid83" level="2">
        <bodyTitle>Articles and contents</bodyTitle>
        <p>The Ctrl-A team is featured in a special issue on
the numeric world
in the
"<i>Dauhiné Libéré des enfants</i>"
(nov.-dec. 2018).</p>
      </subsection>
      <subsection id="uid84" level="2">
        <bodyTitle>Internal action</bodyTitle>
        <p>The Ctrl-A team
participated in the event
"mon équipe en 180 secondes"
at Inria Montbonnot.</p>
      </subsection>
    </subsection>
  </diffusion>
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