Bibliography

Major publications by the team in recent years

• 1C. André.
  Syntax and Semantics of the Clock Constraint Specification Language (CCSL), Inria, 05 2009, n^o RR-6925, 37 p.
  http://hal.inria.fr/inria-00384077/en/
• 2C. André, J. Deantoni, F. Mallet, R. de Simone.
  The Time Model of Logical Clocks available in the OMG MARTE profile, in: Synthesis of Embedded Software: Frameworks and Methodologies for Correctness by Construction, S. K. Shukla, J.-P. Talpin (editors), Springer Science+Business Media, LLC 2010, Jul 2010, pp. 201–227, Chapter 7.
  http://hal.inria.fr/inria-00495664
• 3C. André, F. Mallet, R. de Simone.
  Modeling Time(s), in: MoDELS'2007 10th Intern. Conf. on Model Driven Engineering Languages and Systems, 2007.
• 4A. Benveniste, P. Caspi, S. Edwards, N. Halbwachs, P. Le Guernic, R. de Simone.
  Synchronous Languages Twelve Years Later, in: Proceedings of the IEEE, January 2003.
• 5J. Boucaron, A. Coadou, R. de Simone.
  Formal Modeling of Embedded Systems with Explicit Schedules and Routes, in: Synthesis of Embedded Software: Frameworks and Methodologies for Correctness by Construction, S. K. Shukla, J.-P. Talpin (editors), Springer Science+Business Media, LLC 2010, Jul 2010, pp. 41–78, Chapter 2.
  http://hal.inria.fr/inria-00495667
• 6J. Boucaron, R. de Simone, J.-V. Millo.
  Latency-insensitive design and central repetitive scheduling, in: MEMOCODE, 2006, pp. 175-183.
  http://dx.doi.org/10.1109/MEMCOD.2006.1695923
• 7L. Cucu, N. Pernet, Y. Sorel.
  Periodic real-time scheduling: from deadline-based model to latency-based model, in: Annals of Operations Research, 2007.
  http://www-rocq.inria.fr/syndex/publications/pubs/aor07/aor07.pdf
• 8T. Grandpierre, C. Lavarenne, Y. Sorel.
  Optimized Rapid Prototyping For Real-Time Embedded Heterogeneous multiprocessors, in: Proceedings of 7th International Workshop on Hardware/Software Co-Design, CODES'99, 1999.
• 9T. Grandpierre, Y. Sorel.
  From Algorithm and Architecture Specification to Automatic Generation of Distributed Real-Time Executives: a Seamless Flow of Graphs Transformations, in: Proceedings of First ACM and IEEE International Conference on Formal Methods and Models for Codesign, MEMOCODE'03, Mont Saint-Michel, France, June 2003.
  http://www-rocq.inria.fr/syndex/publications/pubs/memocode03/memocode03.pdf
• 10P. Meumeu Yomsi, Y. Sorel.
  Extending Rate Monotonic Analysis with Exact Cost of Preemptions for Hard Real-Time Systems, in: Proceedings of 19th Euromicro Conference on Real-Time Systems, ECRTS'07, Pisa, Italy, July 2007.
  http://www-rocq.inria.fr/syndex/publications/pubs/ecrts07/ecrts07.pdf
• 11D. Potop-Butucaru, Benoît. Caillaud.
  Correct-by-Construction Asynchronous Implementation of Modular Synchronous Specifications, in: Fundam. Inf., January 2007, vol. 78, pp. 131–159.
  http://portal.acm.org/citation.cfm?id=1366007.1366013
• 12D. Potop-Butucaru, R. de Simone, Y. Sorel.
  From Synchronous Specifications to Statically-Scheduled Hard Real-Time Implementations, in: Synthesis of Embedded Software: Frameworks and Methodologies for Correctness by Construction, S. K. Shukla, J.-P. Talpin (editors), Springer Science+Business Media, LLC 2010, Jul 2010, pp. 229–262, Chapter 8.
  http://hal.inria.fr/inria-00495666
• 13D. Potop-Butucaru, S. Edwards, G. Berry.
  Compiling Esterel, Springer, 2007.
• 14D. Potop-Butucaru, R. de Simone.
  Optimizations for Faster Execution of Esterel Programs, in: MEMOCODE'03, 2003.
• 15R. de Simone, D. Potop-Butucaru, Jean-Pierre. Talpin.
  The Synchronous Hypothesis and Synchronous Languages, in: Embedded Systems Handbook, CRC Press, 2005, chap. 8.

Publications of the year

Doctoral Dissertations and Habilitation Theses

• 16C. Gomez Cardenas.
  Une approche multi-vue pour la modélisation système de propriétés fonctionnelles et non-fonctionnelles, Université Nice Sophia Antipolis, December 2013.
  http://hal.inria.fr/tel-00931001

Articles in International Peer-Reviewed Journals

• 17F. J. Cazorla, E. Quinones, T. Vardanega, L. Cucu, B. Triquet, G. Bernat, E. Berger, J. Abella, F. Wartel, M. Houston, L. Santinelli, L. Kosmidis, C. Lo, D. Maxim.
  PROARTIS: Probabilistically Analyzable Real-Time System, in: ACM Transactions on Embedded Computing Systems, 2013, vol. 12, n^o 2s. [ DOI : 10.1145/2465787.2465796 ]
  http://hal.inria.fr/hal-00920535
• 18A. Goknil, I. Kurtev, K. Van Den Berg.
  Generation and Validation of Traces between Requirements and Architecture based on Formal Trace Semantics, in: The Journal of Systems & Software, October 2013. [ DOI : 10.1016/j.jss.2013.10.006 ]
  http://hal.inria.fr/hal-00871318
• 19J. Liu, Z. Liu, J. He, F. Mallet, Z. Ding.
  Hybrid MARTE statecharts, in: Frontiers of Computer Science, January 2013. [ DOI : 10.1007/s11704-012-1301-1 ]
  http://hal.inria.fr/hal-00800920
• 20J.-V. Millo, R. de Simone.
  Explicit routing schemes for implementation of cellular automata on processor arrays, in: Natural Computing, May 2013, vol. 12, n^o 3, pp. 353-368. [ DOI : 10.1007/s11047-013-9378-5 ]
  http://hal.inria.fr/hal-00913949
• 21J.-V. Millo, F. Mallet, A. Coadou, S. Ramesh.
  Scenario-based verification in presence of variability using a synchronous approach, in: Frontiers of Computer Science, June 2013, vol. 7, n^o 5, pp. 650-672. [ DOI : 10.1007/s11704-013-3094-6 ]
  http://hal.inria.fr/hal-00913955
• 22S.-A.-A. Touati, S. Briais, K. Deschinkel.
  How to eliminate non-positive circuits in periodic scheduling: a procative strategy based on shortest path equations, in: RAIRO-Operations Research, June 2013, vol. 47, n^o 3, pp. 223-249. [ DOI : 10.1051/ro/2013036 ]
  http://hal.inria.fr/hal-00843790
• 23S.-A.-A. Touati, J. Worms, S. Briais.
  The Speedup-Test: A Statistical Methodology for Program Speedup Analysis and Computation, in: Journal of Concurrency and Computation: Practice and Experience, 2013, vol. 25, n^o 10, pp. 1410-1426, Article first published online: 15 OCT 2012. [ DOI : 10.1002/cpe.2939 ]
  http://hal.inria.fr/hal-00764454
• 24H. Yu, Y. Ma, T. Gautier, L. Besnard, J.-P. Talpin, P. Le Guernic, Y. Sorel.
  Exploring system architectures in AADL via Polychrony and SynDEx, in: Frontiers of Computer Science, October 2013, vol. 7, n^o 5, pp. 627-649. [ DOI : 10.1007/s11704-013-2307-z ]
  http://hal.inria.fr/hal-00916445

Articles in National Peer-Reviewed Journals

• 25B. Combemale, J. Deantoni, A. Koudri, J. Le Noir.
  Le nouveau défi de la coordination des langages de modélisation. Gestion de l'hétérogénéité des modèles dans le développement et l'exécution de systèmes logiciels complexes, in: Génie logiciel, 2013, n^o 105, pp. 4-11.
  http://hal.inria.fr/hal-00854221

Invited Conferences

• 26L. Cucu.
  Independence - a misunderstood property of and for probabilistic real-­-time systems, in: Alan Burns 60th Anniversary, York, United Kingdom, N. Audsley, S. Baruah (editors), March 2013.
  http://hal.inria.fr/hal-00920504
• 27L. Cucu.
  Probabilistic real-time scheduling, in: ETR 2013 - Ecole d'été temps réel, Toulouse, France, August 2013.
  http://hal.inria.fr/hal-00920517
• 28L. Cucu.
  Probabilistic real-time systems, in: RTNS 2013 - 21st International Conference on Real-Time Networks and Systems, Sophia Antipolis, France, ACM, October 2013.
  http://hal.inria.fr/hal-00920513

International Conferences with Proceedings

• 29B. Combemale, J. Deantoni, R. France, F. Boulanger, S. Mosser, M. Pantel, B. Rumpe, R. Salay, M. Schindler.
  Report on the First Workshop On the Globalization of Modeling Languages (GEMOC 2013), in: GEMOC+AMINO@MoDELS: GEMOC - 1st International Workshop On the Globalization of Modeling Languages (2013), Miami, United States, CEUR, 2013, vol. Vol-1102, pp. 3-13.
  http://hal.inria.fr/hal-00926244
• 30B. Combemale, J. Deantoni, M. Vara Larsen, F. Mallet, O. Barais, B. Baudry, R. France.
  Reifying Concurrency for Executable Metamodeling, in: SLE - 6th International Conference on Software Language Engineering, Indianapolis, IN, United States, M. Erwig, R. F. Paige, E. Van Wyk (editors), Lecture Notes in Computer Science, Springer, 2013, vol. 8225, pp. 365-384. [ DOI : 10.1007/978-3-319-02654-1_20 ]
  http://hal.inria.fr/hal-00850770
• 31R. Davis, L. Santinelli, S. Altmeyer, C. Maiza, L. Cucu.
  Analysis of Probabilistic Cache Related Pre-emption Delays, in: ECRTS - the 25th Euromicro Conference on Real-time Systems, Paris, France, July 2013.
  http://hal.inria.fr/hal-00920913
• 32A. Goknil, J. Deantoni, M.-A. Peraldi-Frati, F. Mallet.
  Tool Support for the Analysis of TADL2 Timing Constraints using TimeSquare, in: ICECCS'2013 - 18th International Conference on Engineering of Complex Computer Systems, Singapore, Singapore, July 2013.
  http://hal.inria.fr/hal-00850673
• 33A. Goknil, I. Kurtev, J.-V. Millo.
  A Metamodeling Approach for Reasoning on Multiple Requirements Models, in: EDOC 2013 - The 17th IEEE International Enterprise Distributed Object Computing Conference Conference, Vancouver, Canada, September 2013.
  http://hal.inria.fr/hal-00850678
• 34A. Goknil, J. Suryadevara, M.-A. Peraldi-Frati, F. Mallet.
  Analysis Support for TADL2 Timing Constraints on EAST-ADL Models, in: ECSA 2013 - European Conference on Software Architecture, Montpellier, France, K. Drira (editor), LNCS, Springer, July 2013, vol. 7957, pp. 89-105. [ DOI : 10.1007/978-3-642-39031-9_8 ]
  http://hal.inria.fr/hal-00839963
• 35C. Gomez Cardenas, J. Deantoni, F. Mallet.
  Power consumption analysis using multi-view modeling, in: PATMOS - 23th International Workshop on Power and Timing Modeling, Optimization and Simulation, Karlsruhe, Germany, November 2013, pp. 235-238. [ DOI : 10.1109/PATMOS.2013.6662180 ]
  http://hal.inria.fr/hal-00906733
• 36E. Kofman, J.-V. Millo, R. de Simone.
  Application Architecture Adequacy through an FFT case study, in: JRWRTC2013 - 7th Junior Researcher Workshop on Real-Time Computing, Sophia Antipolis, France, Sebastian Altmeyer, October 2013.
  http://hal.inria.fr/hal-00950533
• 37F. Mallet, J.-V. Millo, R. de Simone.
  Safe CCSL Specifications and Marked Graphs, in: MEMOCODE - 11th IEEE/ACM International Conference on Formal Methods and Models for Codesign, Portland, United States, M. Roncken, J.-P. Talpin (editors), IEEE CS, October 2013, pp. 157-166.
  http://hal.inria.fr/hal-00913962
• 38F. Mallet, J.-V. Millo.
  Boundness Issues in CCSL Specifications, in: ICFEM 2013 - 15th International Conference on Formal Engineering Methods, Queenstown, New Zealand, L. Groves, J. Sun (editors), Lecture Notes in Computer Sciences, Springer, October 2013, vol. 8144, pp. 20-35. [ DOI : 10.1007/978-3-642-41202-8_3 ]
  http://hal.inria.fr/hal-00877598
• 39D. Maxim, L. Cucu.
  Response Time Analysis for Fixed-Priority Tasks with Multiple Probabilistic Parameters, in: RTSS 2013 - IEEE Real-Time Systems Symposium, Vancouver, Canada, December 2013.
  http://hal.inria.fr/hal-00918566
• 40A. Mazouz, S.-A.-A. Touati, D. Barthou.
  Dynamic Thread Pinning for Phase-Based OpenMP Programs, in: The Euro-Par 2013 conference, Aachen, Germany, F. Wolf, B. Mohr, D. an Mey (editors), Lecture Notes in Computer Science, Springer, August 2013, vol. 8097, pp. 53-64. [ DOI : 10.1007/978-3-642-40047-6_8 ]
  http://hal.inria.fr/hal-00847482
• 41J.-V. Millo, S. Ramesh, S. Krishna, G. Narwane.
  Compositional Verification of Software Product Lines, in: iFM 2013 - 10th International Conference on integrated Formal Methods, Turku, Finland, June 2013.
  http://hal.inria.fr/hal-00799108
• 42F. Ndoye, Y. Sorel.
  Monoprocessor Real-Time Scheduling of Data Dependent Tasks with Exact Preemption Cost for Embedded Systems, in: ICSE'2013 16th IEEE International Conference on Computational Science and Engineering, Sydney, Australia, December 2013.
  http://hal.inria.fr/hal-00930224
• 43F. Ndoye, Y. Sorel.
  Safety Critical Multiprocessor Real-Time Scheduling with Exact Preemption Cost, in: ICONS 2013 - Eighth International Conference on Systems, Seville, Spain, IARIA, February 2013, pp. 127-136.
  http://hal.inria.fr/hal-00786225
• 44D. Potop-Butucaru, I. Puaut.
  Integrated Worst-Case Execution Time Estimation of Multicore Applications, in: 13th International Workshop on Worst-Case Execution Time Analysis, Paris, France, C. Maiza (editor), Schloss Dagstuh, July 2013, vol. 30, pp. 21-31. [ DOI : 10.4230/OASIcs.WCET.2013.i ]
  http://hal.inria.fr/hal-00909330
• 45Y. Romenska, F. Mallet.
  Lazy Parallel Synchronous Composition of In finite Transition Systems, in: International Conference on ICT in Education, Research and Industrial Applications, Kherson, Ukraine, CEUR-WS.org, June 2013, vol. 1000, pp. 130-145.
  http://hal.inria.fr/hal-00839978
• 46J. Suryadevara, C. Seceleanu, F. Mallet, P. Pettersson.
  Verifying MARTE/CCSL Mode Behaviors Using UPPAAL, in: Software Engineering and Formal Methods, Madrid, Spain, Lecture Notes in Computer Science, Springer, September 2013, vol. 8137, pp. 1-15. [ DOI : 10.1007/978-3-642-40561-7_1 ]
  http://hal.inria.fr/hal-00866477
• 47M. Vara Larsen, A. Goknil.
  Railroad Crossing Heterogeneous Model, in: GEMOC workshop 2013 - International Workshop on The Globalization of Modeling Languages, Miami, Florida, United States, September 2013, This research was supported by ANR GEMOC project..
  http://hal.inria.fr/hal-00867316
• 48F. Wartel, L. Kosmidis, B. Triquet, E. Quinones, J. Abella, A. G. Gogonel, A. Baldovin, E. Mezzetti, L. Cucu, T. Vardanega, F. J. Cazorla.
  Measurement-Based Probabilistic Timing Analysis: Lessons from an Integrated-Modular Avionics Case Study, in: SIES 2013 - the 8th IEEE International Symposium on Industrial Embedded Systems, Porto, Portugal, IEEE, June 2013, pp. 241-248. [ DOI : 10.1109/SIES.2013.6601497 ]
  http://hal.inria.fr/hal-00920538
• 49L. Yin, J. Liu, Z. Ding, F. Mallet, R. de Simone.
  Schedulability analysis with CCSL specifications, in: The 20th Asia-Pacific Software Engineering Conference, Bangkok, Thailand, December 2013.
  http://hal.inria.fr/hal-00926305

Scientific Books (or Scientific Book chapters)

• 50Z. Grygoriy, F. Mallet, Z. Iryna, G. Zholtkevych.
  Two Semantic Models for Clock Relations in the Clock Constraint Specification Language, in: Communications in Computer and Information Science, V. Ermolayev, H. C. Mayr (editors), Communications in Computer and Information Science, Springer, 2013, vol. 412, pp. 190-209. [ DOI : 10.1007/978-3-319-03998-5_10 ]
  http://hal.inria.fr/hal-00926297
• 51Y. Romenska, F. Mallet.
  Improving the Efficiency of Synchronized Product with Infinite Transition Systems, in: Communications in Computer and Information Science, V. Ermolayev, H. C. Mayr (editors), Communications in Computer and Information Science, Springer, 2013, vol. 412, pp. 287-307. [ DOI : 10.1007/978-3-319-03998-5_15 ]
  http://hal.inria.fr/hal-00926299

Books or Proceedings Editing

• 52B. Combemale, J. Deantoni, R. B. France, B. Barn, T. Clark, U. Frank, V. Kulkarni, D. Turk (editors)
  Joint Proceedings of GEMOC '13 and AMINO'13 @ MODELS 2013, CEUR-WS, 2013, vol. 1102, 88 p.
  http://hal.inria.fr/hal-00916282
• 53L. Cucu, R. Davis (editors)
  Proceedings of 1st International Workshop on Mixed-Criticality Systems, University of York, December 2013, 90 p.
  http://hal.inria.fr/hal-00920923

Internal Reports

• 54T. Carle, M. Djemal, D. Potop-Butucaru, R. de Simone, Z. Zhang.
  Off-line mapping of real-time applications onto massively parallel processor arrays, Inria, December 2013, n^o RR-8429.
  http://hal.inria.fr/hal-00919411
• 55F. Mallet, J.-V. Millo, Y. Romenska.
  State-based representation of CCSL operators, Inria, July 2013, n^o RR-8334.
  http://hal.inria.fr/hal-00846684
• 56D. Potop-Butucaru, I. Puaut.
  Integrated Worst-Case Response Time Evaluation of Multicore Non-Preemptive Applications, Inria, February 2013, n^o RR-8234.
  http://hal.inria.fr/hal-00787931

Other Publications

• 57E. Grolleau, J. Goossens, L. Cucu.
  On the periodic behavior of real-time schedulers on identical multiprocessor platforms, 2013.
  http://hal.inria.fr/hal-00920529

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• 59A. Benveniste, G. Berry.
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