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        <h2>Section: 
      Research Program</h2>
        <h3 class="titre3">Research Directions</h3>
        <p>The various objectives we are expecting to reach are directly related to the search of adequacy between the sofware and the new multicore processors evolution. They also correspond to the main research directions suggested by Hall, Padua and Pingali in <a href="./bibliography.html#camus-2015-bid0">[31]</a> . Performance, correction and productivity must be the users' perceived effects. They will be the consequences of research works dealing with the following issues:</p>
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            <p class="notaparagraph"><a name="uid6"> </a>Issue 1: Static Parallelization and Optimization</p>
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            <p class="notaparagraph"><a name="uid9"> </a>Issue 4: Proof of program transformations for multicores</p>
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        <p>Efficient and correct applications development for multicore processors needs stepping in every application development phase, from the initial conception to the final run.</p>
        <p>Upstream, all potential parallelism of the application has to be exhibited. Here static analysis and transformation approaches (issue 1) must be processed, resulting in a <i>multi-parallel</i> intermediate code advising the running virtual machine about all the parallelism that can be taken advantage of. However the compiler does not have much knowledge about the execution environment. It obviously knows the instruction set, it can be aware of the number of available cores, but it does not know the effective available resources at any time during the execution (memory, number of free cores, etc.).</p>
        <p>That is the reason why a “virtual machine” mechanism will have to adapt the application to the resources (issue 3). Moreover the compiler will be able to take advantage only of a part of the parallelism induced by the application. Indeed some program information (variables values, accessed memory adresses, etc.) being available only at runtime, another part of the available parallelism will have to be generated on-the-fly during the execution, here also, thanks to a dynamic mechanism.</p>
        <p>This on-the-fly parallelism extraction will be performed using speculative behavior models (issue 2), such models allowing to generate speculative parallel code (issue 3). Between our behavior modeling objectives, we can add the behavior monitoring, or profiling, of a program version. Indeed current and future architectures complexity avoids assuming an optimal behavior regarding a given program version. A monitoring process will allow to select on-the-fly the best parallelization.</p>
        <p>These different parallelizing steps are schematized on figure <a title="Research Directions" href="./uid5.html#uid10">1</a> .</p>
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	1. </strong>Automatic parallelizing steps for multicore architectures</caption>
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        <p>Our project lies on the conception of a production chain for efficient execution of an application on a multicore architecture. Each link of this chain has to be formally verified in order to ensure correction as well as efficiency. More precisely, it has to be ensured that the compiler produces a correct intermediate code, and that the virtual machine actually performs the parallel execution semantically equivalent to the source code: every transformation applied to the application, either statically by the compiler or dynamically by the virtual machine, must preserve the initial semantics. They must be proved formally (issue 4).</p>
        <p>In the following, those different issues are detailed while forming our global and long term vision of what has to be done.</p>
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