Project-Team Aoste
Members
Overall Objectives
Research Program
Application Domains
New Software and Platforms
New Results
Bilateral Contracts and Grants with Industry
Partnerships and Cooperations
Dissemination
Bibliography
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Bibliography

Major publications by the team in recent years
  • 1C. André.
    Syntax and Semantics of the Clock Constraint Specification Language (CCSL), Inria, 05 2009, no RR-6925, 37 p.
    http://hal.inria.fr/inria-00384077/en/
  • 2C. André, J. Deantoni, F. Mallet, R. de Simone.
    The Time Model of Logical Clocks available in the OMG MARTE profile, in: Synthesis of Embedded Software: Frameworks and Methodologies for Correctness by Construction, S. K. Shukla, J.-P. Talpin (editors), Springer Science+Business Media, LLC 2010, Jul 2010, pp. 201–227, Chapter 7.
  • 3C. André, F. Mallet, R. de Simone.
    Modeling Time(s), in: MoDELS'2007 10th Intern. Conf. on Model Driven Engineering Languages and Systems, 2007.
  • 4A. Benveniste, P. Caspi, S. Edwards, N. Halbwachs, P. Le Guernic, R. de Simone.
    Synchronous Languages Twelve Years Later, in: Proceedings of the IEEE, January 2003.
  • 5J. Boucaron, A. Coadou, R. de Simone.
    Formal Modeling of Embedded Systems with Explicit Schedules and Routes, in: Synthesis of Embedded Software: Frameworks and Methodologies for Correctness by Construction, S. K. Shukla, J.-P. Talpin (editors), Springer Science+Business Media, LLC 2010, Jul 2010, pp. 41–78, Chapter 2.
  • 6J. Boucaron, R. de Simone, J.-V. Millo.
    Latency-insensitive design and central repetitive scheduling, in: MEMOCODE, 2006, pp. 175-183.
    http://dx.doi.org/10.1109/MEMCOD.2006.1695923
  • 7L. Cucu-Grosjean, N. Pernet, Y. Sorel.
    Periodic real-time scheduling: from deadline-based model to latency-based model, in: Annals of Operations Research, 2007.
    http://www-rocq.inria.fr/syndex/publications/pubs/aor07/aor07.pdf
  • 8T. Grandpierre, C. Lavarenne, Y. Sorel.
    Optimized Rapid Prototyping For Real-Time Embedded Heterogeneous multiprocessors, in: Proceedings of 7th International Workshop on Hardware/Software Co-Design, CODES'99, 1999.
  • 9T. Grandpierre, Y. Sorel.
    From Algorithm and Architecture Specification to Automatic Generation of Distributed Real-Time Executives: a Seamless Flow of Graphs Transformations, in: Proceedings of First ACM and IEEE International Conference on Formal Methods and Models for Codesign, MEMOCODE'03, Mont Saint-Michel, France, June 2003.
    http://www-rocq.inria.fr/syndex/publications/pubs/memocode03/memocode03.pdf
  • 10P. Meumeu Yomsi, Y. Sorel.
    Extending Rate Monotonic Analysis with Exact Cost of Preemptions for Hard Real-Time Systems, in: Proceedings of 19th Euromicro Conference on Real-Time Systems, ECRTS'07, Pisa, Italy, July 2007.
    http://www-rocq.inria.fr/syndex/publications/pubs/ecrts07/ecrts07.pdf
  • 11D. Potop-Butucaru, Benoît. Caillaud.
    Correct-by-Construction Asynchronous Implementation of Modular Synchronous Specifications, in: Fundam. Inf., January 2007, vol. 78, pp. 131–159.
    http://portal.acm.org/citation.cfm?id=1366007.1366013
  • 12D. Potop-Butucaru, R. de Simone, Y. Sorel.
    From Synchronous Specifications to Statically-Scheduled Hard Real-Time Implementations, in: Synthesis of Embedded Software: Frameworks and Methodologies for Correctness by Construction, S. K. Shukla, J.-P. Talpin (editors), Springer Science+Business Media, LLC 2010, Jul 2010, pp. 229–262, Chapter 8.
  • 13D. Potop-Butucaru, S. Edwards, G. Berry.
    Compiling Esterel, Springer, 2007.
  • 14D. Potop-Butucaru, R. de Simone.
    Optimizations for Faster Execution of Esterel Programs, in: MEMOCODE'03, 2003.
  • 15R. de Simone, D. Potop-Butucaru, Jean-Pierre. Talpin.
    The Synchronous Hypothesis and Synchronous Languages, in: Embedded Systems Handbook, CRC Press, 2005, chap. 8.
Publications of the year

Doctoral Dissertations and Habilitation Theses

Articles in International Peer-Reviewed Journals

  • 20R. I. Davis, L. Cucu-Grosjean, M. Bertogna, A. Burns.
    A review of priority assignment in real-time systems, in: Journal of Systems Architecture, April 2016, vol. 65, pp. 64 - 82.
    https://hal.inria.fr/hal-01419694
  • 21G. Joël, E. Grolleau, L. Cucu-Grosjean.
    Periodicity of real-time schedules for dependent periodic tasks on identical multiprocessor platforms, in: Real-Time Systems, November 2016, vol. 52, no 6, pp. 808–832. [ DOI : 10.1007/s11241-016-9256-1 ]
    https://hal.inria.fr/hal-01419704
  • 22E. Madelaine, M. Zhang.
    Towards a bisimulation theory for open synchronized networks of automata, in: Science China Information Sciences, May 2016, vol. 59, no 5, 3 p. [ DOI : 10.1007/s11432-016-5557-1 ]
    https://hal.inria.fr/hal-01417652

Invited Conferences

  • 23J. Deantoni.
    Modeling the Behavioral Semantics of Heterogeneous Languages and their Coordination, in: Architecture Centric Virtual Integration (ACVI), Venise, Italy, Julien Delange and Jerome Hugues and Peter Feiler, April 2016.
    https://hal.inria.fr/hal-01291299

International Conferences with Proceedings

  • 24S. Ben-Amor, D. Maxim, L. Cucu-Grosjean.
    Schedulability analysis of dependent probabilistic real-time tasks, in: the 24th International Conference on Real-Time Networks and Systems, Brest, France, November 2016, pp. 99-107. [ DOI : 10.1145/2997465.2997499 ]
    https://hal.inria.fr/hal-01419741
  • 25F. J. Cazorla, J. Abella, J. Andersson, T. Vardanega, F. Vatrinet, I. Bate, I. Broster, M. Azkarate-Askasua, F. Wartel, L. Cucu-Grosjean, C. Fabrice, G. Farrall, A. Gogonel, A. Gianarro, B. Triquet, H. Carles, C. Lo, C. Maxim, D. Morales, E. Quinones, E. Mezzetti, L. Kosmidis, I. Agirre, M. Fernandez, M. Slijepcevic, C. Philippa, W. Talaboulma.
    PROXIMA: Improving Measurement-Based Timing Analysis through Randomisation and Probabilistic Analysis, in: 2016 Euromicro Conference on Digital System Design, Limassol, France, August 2016. [ DOI : 10.1109/DSD.2016.22 ]
    https://hal.inria.fr/hal-01419735
  • 26S. Centomo, J. Deantoni, R. De Simone.
    Using SystemC Cyber Models in an FMI Co-Simulation Environment: Results and Proposed FMI Enhancements, in: 19th Euromicro Conference on Digital System Design 31 August - 2 September 2016, Limassol, Cyprus, 19th Euromicro Conference on Digital System Design, August 2016, vol. 19. [ DOI : 10.1109/DSD.2016.86 ]
    https://hal.inria.fr/hal-01358702
  • 27B. Combemale, C. Brun, J. Champeau, X. Crégut, J. Deantoni, J. Le Noir.
    A Tool-Supported Approach for Concurrent Execution of Heterogeneous Models, in: 8th European Congress on Embedded Real Time Software and Systems (ERTS 2016), Toulouse, France, 2016.
    https://hal.inria.fr/hal-01258358
  • 28D. Du, P. Huang, K. Jiang, F. Mallet, M. Yang.
    MARTE/pCCSL: Modeling and Refining Stochastic Behaviors of CPSs with Probabilistic Logical Clocks, in: FACS 2016 - The 13th International Conference on Formal Aspects of Component Software, Besançon, France, October 2016, Best Paper Award.
    https://hal.inria.fr/hal-01394769
  • 29L. Henrio, O. Kulankhina, S. Li, E. Madelaine.
    Integrated Environment for Verifying and Running Distributed Components, in: Fundamental Approaches to Software Engineering, Eindhoven, Netherlands, P. Stevens, A. Wąsowski (editors), Fundamental Approaches to Software Engineering, Perdita Stevens and Andrzej Wąsowski, April 2016, vol. 9633, pp. 66-83. [ DOI : 10.1007/978-3-662-49665-7_5 ]
    https://hal.inria.fr/hal-01303557
  • 30J. Kienzle, G. Mussbacher, O. Alam, M. Schöttle, N. Belloir, P. Collet, B. Combemale, J. Deantoni, J. Klein, B. Rumpe.
    VCU: The Three Dimensions of Reuse, in: The 15th International Conference on Software Reuse (ICSR-15), Limassol, Cyprus, The 15th International Conference on Software Reuse, 2016.
    https://hal.inria.fr/hal-01287720
  • 31E. Kofman, R. De Simone.
    A formal approach to the mapping of tasks on an heterogenous multicore, energy-aware architecture, in: MEMOCODE'16 - 14th ACM-IEEE International Conference on Formal Methods and Models for System Design, Kanpur, India, November 2016.
    https://hal.inria.fr/hal-01412790
  • 32S. Li, E. Madelaine.
    A Denotational Semantics for Parameterised Networks of Synchronised Automata, in: The 6th International Symposium on Unifying Theories of Programming, Reykjavik, Iceland, Universite de reykjavik, June 2016, 20 p.
    https://hal.inria.fr/hal-01417662
  • 33E. Madelaine, L. Henrio, M. Zhang.
    A Theory for the Composition of Concurrent Processes , in: FORTE, Heraklion, Greece, June 2016.
    https://hal.inria.fr/hal-01344364
  • 34C. Maxim, A. Gogonel, I. Asavoae, M. Asavoae, L. Cucu-Grosjean, W. Talaboulma.
    Reproducibility and representativity - mandatory properties for the compositionality of measurement-based WCET estimation approaches, in: The 9th International Workshop on Compositional Theory and Technology for Real-Time Embedded System (CRTS2016), Porto, Portugal, December 2016.
    https://hal.inria.fr/hal-01421280
  • 35S. E. Saidi, N. Pernet, Y. Sorel, A. B. Ben Khaled.
    Acceleration of FMU Co-Simulation On Multi-core Architectures, in: Japanese Modelica Conference, Tokyo, Japan, Modelica Association, Linköping University Electronic Press (editors), Proceedings of first Japanese Modelica Conference, May 2016, vol. 124, pp. 106 - 112. [ DOI : 10.3384/ecp16124106 ]
    https://hal.inria.fr/hal-01400033
  • 36J. Worms, S. Touati.
    Going beyond mean and median programs performances, in: IEEE MCSoC 2016 : IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, Lyon, France, September 2016.
    https://hal.inria.fr/hal-01371467
  • 37Q. Xu, J. Deantoni, R. De Simone.
    Divergence Detection for CCSL Specification via Clock Causality Chain, in: Symposium on Dependable Software Engineering Theories, Tools and Applications, Beijing, China, Programming and Software Engineering, Springer International Publishing, November 2016, vol. Dependable Software Engineering: Theories, Tools, and Applications, no 9984.
    https://hal.inria.fr/hal-01372694
  • 38D. Yue, V. Joloboff, F. Mallet.
    Flexible Runtime Verification Based On Logical Clock Constraints, in: Forum on specification & Design Languages, Bremen, Germany, September 2016.
    https://hal.inria.fr/hal-01421890
  • 39M. Zhang, F. Mallet, H. Zhu.
    An SMT-Based Approach to the Formal Analysis of MARTE/CCSL, in: Formal Methods and Software Engineering, Tokyo, Japan, Lecture Notes in Computer Science, Springer, November 2016, vol. 10009, pp. 433-449. [ DOI : 10.1007/978-3-319-47846-3_27 ]
    https://hal.inria.fr/hal-01394677

Conferences without Proceedings

  • 40A. Cohen, V. Perrelle, D. Potop-Butucaru, M. Pouzet, E. Soubiran, Z. Zhang.
    Hard Real Time and Mixed Time Criticality on Off-The-Shelf Embedded Multi-Cores, in: 8th European Congress on Embedded Real Time Software and Systems (ERTS 2016), Toulouse, France, January 2016.
    https://hal.archives-ouvertes.fr/hal-01259157
  • 41E. Kofman, R. De Simone, A. Khecharem.
    Multicore SMT scheduling of periodic task systems with energy minimization, in: Workshop on Highly-Reliable Power-Efficient Embedded Designs, Barcelone, Spain, March 2016.
    https://hal.inria.fr/hal-01282264
  • 42D. I. Maxim, R. Davis, L. I. Cucu-Grosjean, A. Easwaran.
    Probabilistic Analysis for Mixed Criticality Scheduling with SMC and AMC, in: WMC 2016, Porto, Portugal, November 2016.
    https://hal.archives-ouvertes.fr/hal-01416310

Internal Reports

  • 43L. Henrio, E. Madelaine, M. Zhang.
    A Theory for the Composition of Concurrent Processes -Extended version, Inria Sophia Antipolis - I3S, April 2016, no RR-8898, 23 p.
    https://hal.inria.fr/hal-01299562
  • 44A. Mehmood Khan, F. Mallet, M. Rashid.
    Natural Interpretation of UML/MARTE Diagrams for System Requirements Specification, I3S ; Inria, April 2016, no RR-8909.
    https://hal.inria.fr/hal-01309604
  • 45J. Worms, S. Touati.
    Parametric and Non-Parametric Statistics for Program Performance Analysis and Comparison, Inria Sophia Antipolis - I3S ; Université Nice Sophia Antipolis ; Université Versailles Saint Quentin en Yvelines ; Laboratoire de mathématiques de Versailles, November 2016, no RR-8875, 70 p.
    https://hal.inria.fr/hal-01286112

Patents

Other Publications

  • 47A. Bertout, D. Maxim, L. Cucu-Grosjean.
    Average Probabilistic Response Time Analysis of Tasks with Multiple Probabilistic Parameters, December 2016, Work in Progress of the 22nd IEEE Real-Time Systems Symposium (RTSS2016), Poster.
    https://hal.inria.fr/hal-01421276
References in notes
  • 48F. Baccelli, G. Cohen, Geert Jan. Olsder, Jean-Pierre. Quadrat.
    Synchronization and Linearity: an algebra for discrete event systems, John Wiley & Sons, 1992.
    http://cermics.enpc.fr/~cohen-g/SED/book-online.html
  • 49A. Benveniste, G. Berry.
    The Synchronous Approach to Reactive and Real-Time Systems, in: Proceedings of the IEEE, September 1991, vol. 79, no 9, pp. 1270-1282.
  • 50J. Carlier, P. Chrétienne.
    Problèmes d'ordonnancement, Masson, 1988.
  • 51L. Carloni, K. McMillan, A. Sangiovanni-Vincentelli.
    Theory of Latency-Insensitive Design, in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2001.
  • 52A. Cohen, M. Duranton, C. Eisenbeis, C. Pagetti, F. Plateau, M. Pouzet.
    N-Synchronous Kahn Networks: a Relaxed Model of Synchrony for Real-Time Systems, in: ACM International Conference on Principles of Programming Languages (POPL'06), Charleston, South Carolina, USA, January 2006.
  • 53J.B. Dennis.
    First Version of a Dataflow Procedure Language, in: Lecture Notes in Computer Science, Springer-Verlag, 1975, vol. 19, pp. 362-376.
  • 54S. Edwards.
    Languages for Digital Embedded Systems, Kluwer, 2000.
  • 55N. Halbwachs.
    Synchronous Programming of Reactive Systems, in: Computer Aided Verification, 1998, pp. 1-16.
    http://www-verimag.imag.fr/~halbwach/newbook.pdf
  • 56Edward A. Lee, D. G. Messerschmitt.
    Static Scheduling of Synchronous Data Flow Programs for Digital Signal Processing, in: IEEE Trans. Computers, 1987.
  • 57C.L. Liu, J.W. Layland.
    Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment, in: Journal of the ACM, 1973.

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