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	    2016</a> | <a href="http://www.inria.fr/en/teams/cairn">Presentation of the Project-Team CAIRN</a> | <a href="http://www.irisa.fr/cairn">CAIRN Web Site
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        <h2>Section: 
      Research Program</h2>
        <h3 class="titre3">Panorama</h3>
        <p class="notaparagraph">The development of complex applications is traditionally split in three stages: a theoretical study of the algorithms, an analysis of the target architecture and the implementation. When facing new emerging applications such as high-performance, low-power and low-cost mobile communication systems or smart sensor-based systems, it is mandatory to strengthen the design flow by a joint study of both algorithmic and architectural issues.</p>
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	1. </strong><span class="smallcap">Cairn </span>'s general design flow and related research themes</caption>
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        <p>Figure <a title="Panorama" href="./uid5.html#uid6">1</a> shows the global design flow we propose to develop. This flow is organized in levels which refer to our three research themes: application optimization (new algorithms, fixed-point arithmetic, advanced representations of numbers), architecture optimization (reconfigurable and specialized hardware, application-specific processors, arithmetic operators and functions), and stepwise refinement and code generation (code transformations, hardware synthesis, compilation).</p>
        <p class="notaparagraph">In the rest of this part, we briefly describe the challenges concerning <b>new reconfigurable platforms</b> in Section <a title="Reconfigurable Architecture Design" href="./uid7.html">3.2</a> and the issues on <b>compiler and synthesis tools</b> related to these platforms in Section <a title="Compilation and Synthesis for Reconfigurable Platforms" href="./uid8.html">3.3</a>.</p>
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