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        <h2>Section: 
      Overall Objectives</h2>
        <h3 class="titre3">Summary of Compsys II
Achievements</h3>
        <p>Due to Compsys size reduction (from 5 permanent researchers to 3 in 2008,
then 4 again in 2009), the team then focused, in Compsys II, on two research
directions only:</p>
        <ul>
          <li>
            <p class="notaparagraph"><a name="uid15"> </a>Code generation for embedded processors, on the two opposite, though
connected, aspects: aggressive compilation and just-in-time compilation.</p>
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            <p class="notaparagraph"><a name="uid16"> </a>High-level program analysis and transformations for high-level synthesis
tools.</p>
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        <p>The main achievements of Compsys II were:</p>
        <ul>
          <li>
            <p class="notaparagraph"><a name="uid17"> </a>the great success of the collaboration with STMicroelectronics with many
deep results on SSA (Static Single Assignment), register
allocation, liveness scalar analysis, and intermediate program
representations;</p>
          </li>
          <li>
            <p class="notaparagraph"><a name="uid18"> </a>the design of high-level program analysis, optimizations, and
tools, mainly related to high-level synthesis (some leading to the
development of the Zettice start-up), including liveness array
analysis, memory folding, as well as program (while loops)
termination.</p>
          </li>
        </ul>
        <p>For more details on the past years of Compsys II, see the previous annual
reports from 2008 to 2012. Compsys II was positively evaluated in Spring
2012 by Inria. The evaluation committee members were Walid Najjar
(University of California Riverside), Paolo Faraboschi (HP Labs), Scott Mahlke
(University of Michigan), Pedro Diniz (University of Southern California),
Peter Marwedel (TU Dortmund), and Pierre Paulin (STMicroelectronics, Canada),
the last three assigned specifically to Compsys.
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