Bibliography

Publications of the year

Articles in International Peer-Reviewed Journals

• 1E. Agullo, P. R. Amestoy, A. Buttari, A. Guermouche, J.-Y. L'Excellent, F.-H. Rouet.
  Robust memory-aware mappings for parallel multifrontal factorizations, in: SIAM Journal on Scientific Computing, July 2016, vol. 38, n^o 3, 23 p.
  https://hal.inria.fr/hal-01334113
• 2P. R. Amestoy, R. Brossier, A. Buttari, J.-Y. L'Excellent, T. Mary, L. Métivier, A. Miniussi, S. Operto.
  Fast 3D frequency-domain full waveform inversion with a parallel Block Low-Rank multifrontal direct solver: application to OBC data from the North Sea, in: Geophysics, 2016, vol. 81, n^o 6, pp. R363-R383.
  https://hal.inria.fr/hal-01349119
• 3G. Aupy, A. Benoit.
  Approximation Algorithms for Energy, Reliability, and Makespan Optimization Problems, in: Parallel Processing Letters, 2016, vol. 26, n^o 01, 23 p.
  https://hal.inria.fr/hal-01252333
• 4G. Aupy, A. Benoit, H. Casanova, Y. Robert.
  Checkpointing Strategies for Scheduling Computational Workflows, in: International Journal of Networking and Computing, 2016, vol. 6, n^o 1, pp. 2-26. [ DOI : 10.15803/ijnc.6.1_2 ]
  https://hal.inria.fr/hal-01354874
• 5G. Aupy, J. Herrmann, P. Hovland, Y. Robert.
  Optimal Multistage Algorithm for Adjoint Computation, in: SIAM Journal on Scientific Computing, 2016, vol. 38, n^o 3, pp. C232–C255. [ DOI : 10.1137/15M1019222 ]
  https://hal.inria.fr/hal-01354902
• 6G. Aupy, M. Shantharam, A. Benoit, Y. Robert, P. Raghavan.
  Co-scheduling algorithms for high-throughput workload execution, in: Journal of Scheduling, 2016, 14 p. [ DOI : 10.1007/s10951-015-0445-x ]
  https://hal.inria.fr/hal-01252366
• 7L. Bautista-Gomez, A. Benoit, A. Cavelan, Y. Robert, H. Sun.
  Coping with recall and precision of soft error detectors, in: Journal of Parallel and Distributed Computing, 2016, vol. 98, pp. 8–24. [ DOI : 10.1016/j.jpdc.2016.07.007 ]
  https://hal.inria.fr/hal-01354888
• 8A. Benoit, A. Cavelan, Y. Robert, H. Sun.
  Assessing general-purpose algorithms to cope with fail-stop and silent errors, in: ACM Transactions on Parallel Computing, 2016.
  https://hal.inria.fr/hal-01358146
• 9A. Benoit, S. K. Raina, Y. Robert.
  Efficient checkpoint/verification patterns, in: International Journal of High Performance Computing Applications, 2016. [ DOI : 10.1177/1094342015594531 ]
  https://hal-ens-lyon.archives-ouvertes.fr/ensl-01252342
• 10M. Benzi, B. Uçar.
  Preconditioning Techniques Based on the Birkhoff–von Neumann Decomposition, in: Computational Methods in Applied Mathematics, January 2016. [ DOI : 10.1515/cmam-2016-0040 ]
  https://hal.inria.fr/hal-01318486
• 11S. Di, Y. Robert, F. Vivien, F. Cappello.
  Toward an Optimal Online Checkpoint Solution under a Two-Level HPC Checkpoint Model, in: IEEE Transactions on Parallel and Distributed Systems, January 2017, vol. 28, n^o 1, 16 p. [ DOI : 10.1109/TPDS.2016.2546248 ]
  https://hal.inria.fr/hal-01353871
• 12F. Dufossé, B. Uçar.
  Notes on Birkhoff-von Neumann decomposition of doubly stochastic matrices, in: Linear Algebra and its Applications, February 2016, vol. 497, pp. 108–115. [ DOI : 10.1016/j.laa.2016.02.023 ]
  https://hal.inria.fr/hal-01270331
• 13M. Fasi, J. Langou, Y. Robert, B. Uçar.
  A backward/forward recovery approach for the preconditioned conjugate gradient method, in: Journal of Computational Science, 2016. [ DOI : 10.1016/j.jocs.2016.04.008 ]
  https://hal.inria.fr/hal-01354682
• 14J. Herrmann, G. Bosilca, T. Hérault, L. Marchal, Y. Robert, J. Dongarra.
  Assessing the cost of redistribution followed by a computational kernel: Complexity and performance results, in: Parallel Computing, 2016, vol. 52, 20 p. [ DOI : 10.1016/j.parco.2015.09.005 ]
  https://hal.inria.fr/hal-01254167

International Conferences with Proceedings

• 15C. Alias, C. Fuhs, L. Gonnord.
  Estimation of Parallel Complexity with Rewriting Techniques, in: Workshop on Termination, Obergurgl, Austria, Workshop on Termination, September 2016.
  https://hal.archives-ouvertes.fr/hal-01345914
• 16M. Bender, J. Berry, R. Johnson, T. Kroeger, S. Mccauley, C. Phillips, B. Simon, S. Singh, D. Zage.
  Anti-Persistence on Persistent Storage: History-Independent Sparse Tables and Dictionaries, in: Principle of Database Systems (PODS 2016), San Francisco, United States, 2016. [ DOI : 10.1145/2902251.2902276 ]
  https://hal.inria.fr/hal-01326312
• 17M. Bender, R. Chowdhury, A. Conway, M. Farach-Colton, P. Ganapathi, R. Johnson, S. Mccauley, B. Simon, S. Singh.
  The I/O Complexity of Computing Prime Tables, in: Latin American Theoretical Informatics Symposium, Ensenada, Mexico, LNCS, 2016, vol. 9644, pp. 192-206. [ DOI : 10.1007/978-3-662-49529-2_15 ]
  https://hal.inria.fr/hal-01326317
• 18M. A. Bender, S. Mccauley, B. Simon, S. Singh, F. Vivien.
  Resource Optimization for Program Committee Members: A Subreview Article, in: 8th International Conference on Fun with Algorithms, La Maddalena, Italy, Leibniz International Proceedings in Informatics (LIPIcs), 2016, vol. 49, n^o 8th International Conference on Fun with Algorithms (FUN 2016), 20 p. [ DOI : 10.4230/LIPIcs.FUN.2016.7 ]
  https://hal.inria.fr/hal-01326277
• 19A. Benoit, A. Cavelan, V. Le Fèvre, Y. Robert, H. Sun.
  A different re-execution speed can help, in: 5th International Workshop on Power-aware Algorithms, Systems, and Architectures (PASA'16), held in conjunction with ICPP 2016, the 45th International Conference on Parallel Processing, Philadelphia, United States, Proceedings of ICPP'2016 workshops (ICPPW'16), August 2016.
  https://hal.inria.fr/hal-01354887
• 20A. Benoit, A. Cavelan, Y. Robert, H. Sun.
  Optimal Resilience Patterns to Cope with Fail-Stop and Silent Errors, in: IPDPS’2016, the 30th IEEE International Parallel and Distributed Processing Symposium, Chicago, United States, Proceedings of IPDPS’2016, the 30th IEEE International Parallel and Distributed Processing Symposium, IEEE Computer Society Press, May 2016. [ DOI : 10.1109/IPDPS.2016.39 ]
  https://hal.inria.fr/hal-01354886
• 21A. Benoit, A. Cavelan, Y. Robert, H. Sun.
  Two-Level Checkpointing and Verifications for Linear Task Graphs, in: The 17th IEEE International Workshop on Parallel and Distributed Scientific and Engineering Computing (PDSEC 2016), Chicago, United States, 2016 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), IEEE, May 2016, 10 p. [ DOI : 10.1109/IPDPSW.2016.106 ]
  https://hal.inria.fr/hal-01354625
• 22A. Benoit, L. Pottier, Y. Robert.
  Resilient application co-scheduling with processor redistribution, in: International Conference on Parallel Processing (ICPP), Philadelphia, United States, The 45th International Conference on Parallel Processing, August 2016.
  https://hal.inria.fr/hal-01354863
• 23G. Bosilca, A. Bouteiller, A. Guermouche, T. Herault, Y. Robert, P. Sens, J. Dongarra.
  Failure Detection and Propagation in HPC systems, in: SC'2016 (SuperComputing), Salt Lake City, United States, ACM, November 2016.
  https://hal.inria.fr/hal-01419279
• 24G. Bosilca, A. Bouteiller, A. Guermouche, T. Hérault, Y. Robert, P. Sens, J. Dongarra.
  Failure Detection and Propagation in HPC systems, in: SC 2016 - The International Conference for High Performance Computing, Networking, Storage and Analysis, Salt Lake City, United States, November 2016.
  https://hal.inria.fr/hal-01352109
• 25H. Casanova, J. Herrmann, Y. Robert.
  Computing the expected makespan of task graphs in the presence of silent errors, in: Ninth International Workshop on Parallel Programming Models and Systems Software for High-End Computing (P2S2), 2016, Philadelphia, United States, Ninth International Workshop on Parallel Programming Models and Systems Software for High-End Computing (P2S2), 2016, August 2016.
  https://hal.inria.fr/hal-01354711
• 26A. Cavelan, J. Li, Y. Robert, H. Sun.
  When Amdahl Meets Young/Daly, in: Cluster'2016, Taipei, Taiwan, France, Cluster'2016, IEEE Computer Society, September 2016.
  https://hal.inria.fr/hal-01355963
• 27F. Hanna, L. Marchal, J.-M. Nicod, L. Philippe, V. Rehn-Sonigo, H. Sabbah.
  Minimizing Rental Cost for Multiple Recipe Applications in the Cloud, in: IPDPS Workshops, Chicago, United States, 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016, pp. 28–37. [ DOI : 10.1109/IPDPSW.2016.71 ]
  https://hal.inria.fr/hal-01356152
• 28O. Kaya, B. Uçar.
  High Performance Parallel Algorithms for the Tucker Decomposition of Sparse Tensors, in: International Conference on Parallel Processing (ICPP), 2016-08-19, United States, August 2016.
  https://hal.inria.fr/hal-01354894
• 29M. Maalej, V. Paisante, R. Pedro, L. Gonnord, F. M. Quintão Pereira.
  Pointer Disambiguation via Strict Inequalities, in: Code Generation and Optimisation, Austin, United States, February 2017.
  https://hal.archives-ouvertes.fr/hal-01387031
• 30D. Monniaux, L. Gonnord.
  Cell morphing: from array programs to array-free Horn clauses, in: 23rd Static Analysis Symposium (SAS 2016), Edimbourg, United Kingdom, X. Rival (editor), Static Analysis Symposium, September 2016.
  https://hal.archives-ouvertes.fr/hal-01206882
• 31V. Paisante, M. Maalej, L. Barbosa, L. Gonnord, F. M. Quintão Pereira.
  Symbolic Range Analysis of Pointers, in: International Symposium of Code Generation and Optmization, Barcelon, Spain, March 2016, pp. 791-809.
  https://hal.inria.fr/hal-01228928
• 32I. Rais, L. Lefèvre, A. Benoit, A.-C. Orgerie.
  An Analysis of the Feasibility of Energy Harvesting with Thermoelectric Generators on Petascale and Exascale Systems, in: Workshop Optimization of Energy Efficient HPC & Distributed Systems (OPTIM 2016) - The 2016 International Conference on High Performance Computing & Simulation (HPCS 2016), Innsbruck, Austria, Proceedings of the 2016 International Conference on High Performance Computing & Simulation (HPCS 2016), July 2016.
  https://hal.inria.fr/hal-01348554

Conferences without Proceedings

• 33I. Rais, A. Benoit, L. Lefèvre, A.-C. Orgerie.
  An Analysis of the Feasibility of Energy Harvesting with Thermoelectric Generators on Petascale and Exascale Systems, in: Conférence d’informatique en Parallélisme, Architecture et Système (COMPAS 2016), Lorient, France, Actes de COMPAS, la Conférence d’informatique en Parallélisme, Architecture et Système, July 2016.
  https://hal.inria.fr/hal-01348555

Scientific Books (or Scientific Book chapters)

• 34G. Aupy, A. Benoit, A. Cavelan, M. Fasi, Y. Robert, H. Sun, B. Uçar.
  Coping with silent errors in HPC applications, in: Emergent Computation, A. Adamatzky (editor), Springer Verlag, 2016.
  https://hal.inria.fr/hal-01354892

Books or Proceedings Editing

• 35A. H. Gebremedhin, E. G. Boman, B. Uçar (editors)
  2016 Proceedings of the Seventh SIAM Workshop on Combinatorial Scientific Computing, 2016. [ DOI : 10.1137/1.9781611974690 ]
  https://hal.inria.fr/hal-01415503

Internal Reports

• 36C. Alias, F. Rastello, A. Plesco.
  High-Level Synthesis of Pipelined FSM from Loop Nests, Inria, April 2016, n^o 8900, 18 p.
  https://hal.inria.fr/hal-01301334
• 37P. Amestoy, A. Buttari, J.-Y. L'Excellent, T. Mary.
  On the Complexity of the Block Low-Rank Multifrontal Factorization, INPT-IRIT ; CNRS-IRIT ; Inria-LIP ; UPS-IRIT, May 2016, n^o IRIT/RT–2016–03–FR, 34 p.
  https://hal.archives-ouvertes.fr/hal-01322230
• 38G. Aupy, A. Benoit, L. Pottier, P. Raghavan, Y. Robert, M. Shantharam.
  Co-scheduling algorithms for cache-partitioned systems, Inria Grenoble - Rhone-Alpes ; ENS de Lyon, November 2016, n^o RR-8965, 28 p.
  https://hal.inria.fr/hal-01393989
• 39G. Aupy, C. Brasseur, L. Marchal.
  Dynamic memory-aware task-tree scheduling, Inria Grenoble - Rhone-Alpes, October 2016, n^o RR-8966.
  https://hal.inria.fr/hal-01390107
• 40G. Aupy, Y. Robert.
  Scheduling for fault-tolerance: an introduction, Inria, November 2016, n^o RR-8971.
  https://hal.inria.fr/hal-01393192
• 41O. Beaumont, T. Lambert, L. Marchal, B. Thomas.
  Matching-Based Allocation Strategies for Improving Data Locality of Map Tasks in MapReduce, Inria - Research Centre Grenoble – Rhône-Alpes ; Inria Bordeaux Sud-Ouest, November 2016, n^o RR-8968.
  https://hal.inria.fr/hal-01386539
• 42A. Benoit, A. Cavelan, V. Le Fèvre, Y. Robert, H. Sun.
  A different re-execution speed can help, Inria Grenoble - Rhone-Alpes, March 2016, n^o RR-8888.
  https://hal.inria.fr/hal-01297125
• 43A. Benoit, A. Cavelan, V. Le Fèvre, Y. Robert, H. Sun.
  Towards Optimal Multi-Level Checkpointing, Inria Grenoble - Rhone-Alpes, June 2016, n^o RR-8930.
  https://hal.inria.fr/hal-01339788
• 44A. Benoit, A. Cavelan, Y. Robert, H. Sun.
  Multi-level checkpointing and silent error detection for linear workflows, Inria, September 2016, n^o RR-8952.
  https://hal.inria.fr/hal-01363581
• 45J. Braine, L. Gonnord, D. Monniaux.
  Verifying Programs with Arrays and Lists, ENS Lyon, June 2016.
  https://hal.archives-ouvertes.fr/hal-01337140
• 46A. Cavelan, J. Li, Y. Robert, H. Sun.
  When Amdahl Meets Young/Daly, ENS Lyon, CNRS & Inria, February 2016, n^o RR-8871.
  https://hal.inria.fr/hal-01280004
• 47S. Di, Y. Robert, F. Vivien, F. Cappello.
  Toward an Optimal Online Checkpoint Solution under a Two-Level HPC Checkpoint Model, Inria Grenoble - Rhone-Alpes, January 2016, n^o RR-8851.
  https://hal.inria.fr/hal-01263879
• 48M. Faverge, J. Langou, Y. Robert, J. Dongarra.
  Bidiagonalization with Parallel Tiled Algorithms, Inria, October 2016, n^o RR-8969.
  https://hal.inria.fr/hal-01389232
• 49O. Kaya, B. Uçar.
  Parallel CP decomposition of sparse tensors using dimension trees, Inria - Research Centre Grenoble – Rhône-Alpes, November 2016, n^o RR-8976.
  https://hal.inria.fr/hal-01397464
• 50E. Kayaaslan, T. Lambert, L. Marchal, B. Uçar.
  Scheduling Series-Parallel Task Graphs to Minimize Peak Memory, Inria Grenoble Rhône-Alpes, Université de Grenoble, November 2016, n^o RR-8975.
  https://hal.inria.fr/hal-01397299
• 51M. Maalej, V. Paisante, F. M. Quintão Pereira, L. Gonnord.
  Combining Range and Inequality Information for Pointer Disambiguation, ENS Lyon, CNRS & Inria, December 2016, n^o RR-9009.
  https://hal.inria.fr/hal-01429777
• 52L. Marchal, B. Simon, O. Sinnen, F. Vivien.
  Malleable task-graph scheduling with a practical speed-up model, ENS de Lyon, February 2016, n^o RR-8856.
  https://hal.inria.fr/hal-01274099
• 53R. Portase, B. Uçar.
  On matrix symmetrization and sparse direct solvers, Inria - Research Centre Grenoble – Rhône-Alpes, November 2016, n^o RR-8977.
  https://hal.inria.fr/hal-01398951

References in notes

• 54Blue Waters Newsletter, dec 2012.
  http://cgi.ncsa.illinois.edu/BlueWaters/pdfs/bw-newsletter-1212.pdf
• 55Blue Waters Resources, 2013.
  https://bluewaters.ncsa.illinois.edu/data
• 56The BOINC project, 2013.
  http://boinc.berkeley.edu/
• 57Final report of the Department of Energy Fault Management Workshop, December 2012.
  https://science.energy.gov/~/media/ascr/pdf/program-documents/docs/FaultManagement-wrkshpRpt-v4-final.pdf
• 58System Resilience at Extreme Scale: white paper, 2008, DARPA.
  http://institute.lanl.gov/resilience/docs/IBM%20Mootaz%20White%20Paper%20System%20Resilience.pdf
• 59Top500 List - November, 2011.
  http://www.top500.org/list/2011/11/
• 60Top500 List - November, 2012.
  http://www.top500.org/list/2012/11/
• 61The Green500 List - November, 2015.
  https://www.top500.org/green500/lists/2015/11/
• 62I. Assayad, A. Girault, H. Kalla.
  Tradeoff exploration between reliability power consumption and execution time, in: Proceedings of SAFECOMP, the Conf. on Computer Safety, Reliability and Security, Washington, DC, USA, 2011.
• 63H. Aydin, Q. Yang.
  Energy-aware partitioning for multiprocessor real-time systems, in: IPDPS'03, the IEEE Int. Parallel and Distributed Processing Symposium, 2003, pp. 113–121.
• 64N. Bansal, T. Kimbrel, K. Pruhs.
  Speed Scaling to Manage Energy and Temperature, in: Journal of the ACM, 2007, vol. 54, n^o 1, pp. 1 – 39.
  http://doi.acm.org/10.1145/1206035.1206038
• 65A. Benoit, L. Marchal, J.-F. Pineau, Y. Robert, F. Vivien.
  Scheduling concurrent bag-of-tasks applications on heterogeneous platforms, in: IEEE Transactions on Computers, 2010, vol. 59, n^o 2, pp. 202-217.
• 66S. Blackford, J. Choi, A. Cleary, E. D'Azevedo, J. Demmel, I. Dhillon, J. Dongarra, S. Hammarling, G. Henry, A. Petitet, K. Stanley, D. Walker, R. C. Whaley.
  ScaLAPACK Users' Guide, SIAM, 1997.
• 67S. Blackford, J. Dongarra.
  Installation Guide for LAPACK, LAPACK Working Note, June 1999, n^o 41, originally released March 1992.
• 68A. Buttari, J. Langou, J. Kurzak, J. Dongarra.
  Parallel tiled QR factorization for multicore architectures, in: Concurrency: Practice and Experience, 2008, vol. 20, n^o 13, pp. 1573-1590.
• 69J.-J. Chen, T.-W. Kuo.
  Multiprocessor energy-efficient scheduling for real-time tasks, in: ICPP'05, the Int. Conference on Parallel Processing, 2005, pp. 13–20.
• 70S. Donfack, L. Grigori, W. Gropp, L. V. Kale.
  Hybrid Static/dynamic Scheduling for Already Optimized Dense Matrix Factorization, in: Parallel Distributed Processing Symposium (IPDPS), 2012 IEEE 26th International, 2012, pp. 496-507.
  http://dx.doi.org/10.1109/IPDPS.2012.53
• 71J. Dongarra, J.-F. Pineau, Y. Robert, Z. Shi, F. Vivien.
  Revisiting Matrix Product on Master-Worker Platforms, in: International Journal of Foundations of Computer Science, 2008, vol. 19, n^o 6, pp. 1317-1336.
• 72J. Dongarra, J.-F. Pineau, Y. Robert, F. Vivien.
  Matrix Product on Heterogeneous Master-Worker Platforms, in: 13th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, Salt Lake City, Utah, February 2008, pp. 53–62.
• 73I. S. Duff, J. K. Reid.
  The multifrontal solution of indefinite sparse symmetric linear systems, in: "ACM Transactions on Mathematical Software", 1983, vol. 9, pp. 302-325.
• 74I. S. Duff, J. K. Reid.
  The multifrontal solution of unsymmetric sets of linear systems, in: SIAM Journal on Scientific and Statistical Computing, 1984, vol. 5, pp. 633-641.
• 75P. Feautrier, C. Lengauer.
  The Polyhedron Model, in: Encyclopedia of Parallel Programming, 2011.
• 76L. Grigori, J. W. Demmel, H. Xiang.
  Communication avoiding Gaussian elimination, in: Proceedings of the 2008 ACM/IEEE conference on Supercomputing, Piscataway, NJ, USA, SC '08, IEEE Press, 2008, 29:1 p.
  http://dl.acm.org/citation.cfm?id=1413370.1413400
• 77B. Hadri, H. Ltaief, E. Agullo, J. Dongarra.
  Tile QR Factorization with Parallel Panel Processing for Multicore Architectures, in: IPDPS'10, the 24st IEEE Int. Parallel and Distributed Processing Symposium, 2010.
• 78J. W. H. Liu.
  The multifrontal method for sparse matrix solution: Theory and Practice, in: SIAM Review, 1992, vol. 34, pp. 82–109.
• 79R. Melhem, D. Mossé, E. Elnozahy.
  The Interplay of Power Management and Fault Recovery in Real-Time Systems, in: IEEE Transactions on Computers, 2004, vol. 53, n^o 2, pp. 217-231.
• 80A. J. Oliner, R. K. Sahoo, J. E. Moreira, M. Gupta, A. Sivasubramaniam.
  Fault-aware job scheduling for bluegene/l systems, in: IPDPS'04, the IEEE Int. Parallel and Distributed Processing Symposium, 2004, pp. 64–73.
• 81G. Quintana-Ortí, E. Quintana-Ortí, R. A. van de Geijn, F. G. V. Zee, E. Chan.
  Programming Matrix Algorithms-by-Blocks for Thread-Level Parallelism, in: ACM Transactions on Mathematical Software, 2009, vol. 36, n^o 3.
• 82Y. Robert, F. Vivien.
  Algorithmic Issues in Grid Computing, in: Algorithms and Theory of Computation Handbook, Chapman and Hall/CRC Press, 2009.
• 83G. Zheng, X. Ni, L. V. Kale.
  A scalable double in-memory checkpoint and restart scheme towards exascale, in: Dependable Systems and Networks Workshops (DSN-W), 2012.
  http://dx.doi.org/10.1109/DSNW.2012.6264677
• 84D. Zhu, R. Melhem, D. Mossé.
  The effects of energy management on reliability in real-time embedded systems, in: Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design (ICCAD), 2004, pp. 35–40.