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      <div class="TdmEntry">Overall Objectives<ul><li class="tdmActPage"><a href="./uid3.html">Introduction</a></li><li><a href="./uid6.html">General Presentation</a></li><li><a href="./uid11.html">Summary of Compsys I Achievements</a></li><li><a href="./uid17.html">Quick view of Compsys II
Achievements and directions for Compsys III</a></li><li><a href="./uid20.html">Highlights of the Year</a></li></ul></div>
      <div class="TdmEntry">Research Program<ul><li><a href="uid30.html&#10;&#9;&#9;  ">Generalities</a></li><li><a href="uid33.html&#10;&#9;&#9;  ">Back-End Code Optimizations for Embedded Processors</a></li><li><a href="uid45.html&#10;&#9;&#9;  ">High-Level Program Analysis and
Transformations</a></li></ul></div>
      <div class="TdmEntry">Application Domains<ul><li><a href="uid56.html&#10;&#9;&#9;  ">Compilers for Embedded Computing Systems</a></li></ul></div>
      <div class="TdmEntry">Software and Platforms<ul><li><a href="uid58.html&#10;&#9;&#9;  ">Introduction</a></li><li><a href="uid59.html&#10;&#9;&#9;  ">Pip</a></li><li><a href="uid60.html&#10;&#9;&#9;  ">Syntol</a></li><li><a href="uid63.html&#10;&#9;&#9;  ">Cl@k</a></li><li><a href="uid64.html&#10;&#9;&#9;  ">PoCo</a></li><li><a href="uid70.html&#10;&#9;&#9;  ">Bee</a></li><li><a href="uid74.html&#10;&#9;&#9;  ">Chuba</a></li><li><a href="uid75.html&#10;&#9;&#9;  ">Dcc</a></li><li><a href="uid76.html&#10;&#9;&#9;  ">IceGEN</a></li><li><a href="uid79.html&#10;&#9;&#9;  ">C2fsm</a></li><li><a href="uid80.html&#10;&#9;&#9;  ">Aspic</a></li><li><a href="uid81.html&#10;&#9;&#9;  ">RanK</a></li><li><a href="uid82.html&#10;&#9;&#9;  ">SToP</a></li><li><a href="uid83.html&#10;&#9;&#9;  ">Simplifiers</a></li><li><a href="uid84.html&#10;&#9;&#9;  ">LAO Developments in Aggressive Compilation</a></li><li><a href="uid85.html&#10;&#9;&#9;  ">LAO Developments in JIT Compilation</a></li><li><a href="uid86.html&#10;&#9;&#9;  ">Low-Level Exchange Format (TireX) and
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      <div class="TdmEntry">New Results<ul><li><a href="uid88.html&#10;&#9;&#9;  ">Parameterized Construction of Program Representations for Sparse Dataflow Analysiss</a></li><li><a href="uid89.html&#10;&#9;&#9;  ">A Framework for Enhancing Data Reuse via Associative Reordering</a></li><li><a href="uid90.html&#10;&#9;&#9;  ">Function Cloning Revisited</a></li><li><a href="uid91.html&#10;&#9;&#9;  ">Register Allocation and Promotion through Combined Instruction Scheduling, Loop Splitting and Unrolling</a></li><li><a href="uid92.html&#10;&#9;&#9;  ">Beyond Reuse Distance Analysis: Dynamic Analysis for Characterization of Data Locality Potential</a></li><li><a href="uid93.html&#10;&#9;&#9;  ">Characterizing the Inherent Data Movement Complexity of Computations via Lower Bounds</a></li><li><a href="uid94.html&#10;&#9;&#9;  ">Enhancing the Compilation of Synchronous Dataflow Programs</a></li><li><a href="uid95.html&#10;&#9;&#9;  ">Synthesis of Ranking Functions
using Extremal Counter-Examples</a></li><li><a href="uid98.html&#10;&#9;&#9;  ">Data-Aware Process Networks</a></li><li><a href="uid107.html&#10;&#9;&#9;  ">Program Equivalence Modulo A/C (Associativity/Commutativity)</a></li><li><a href="uid110.html&#10;&#9;&#9;  ">Constant Aspect-Ratio Parametric Tiling</a></li><li><a href="uid111.html&#10;&#9;&#9;  ">Parametric Tiling with Inter-Tile
Data Reuse</a></li><li><a href="uid112.html&#10;&#9;&#9;  ">Data Races in the Parallel Language X10</a></li><li><a href="uid113.html&#10;&#9;&#9;  ">Clock Removal in X10</a></li><li><a href="uid114.html&#10;&#9;&#9;  ">Static Analysis of OpenStream Programs</a></li><li><a href="uid118.html&#10;&#9;&#9;  ">Array Contraction in
Parallel Programs</a></li></ul></div>
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	    2013</a> | <a href="http://www.inria.fr/en/teams/compsys">Presentation of the Project-Team COMPSYS</a> | <a href="http://www.ens-lyon.fr/LIP/COMPSYS/index.html.en">COMPSYS Web Site
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        <h2>Section: 
      Overall Objectives</h2>
        <h3 class="titre3">Introduction</h3>
        <dl>
          <dt>Keywords:</dt>
          <dd>
            <p class="notaparagraph"><a name="uid4"> </a>Compilation, code analysis, code optimization, memory
optimization, combinatorial optimization, algorithmics, polyhedral
optimization, hardware accelerators, high-level synthesis, high-performance
computing.</p>
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        <p>The objective of Compsys is to adapt and to extend code analysis and code
optimization techniques primarily designed in compilers/parallelizers for
high performance computing to the special case of <i>embedded computing
systems</i>. In particular, Compsys works on back-end optimizations for
specialized processors and on high-level program transformations, in
particular for the compilation towards or the synthesis of hardware
accelerators. The main characteristic of Compsys is its focus on
combinatorial problems (graph algorithms, linear programming, polyhedra)
coming from code optimizations (register allocation, cache and memory
optimizations, scheduling, optimizations for power, automatic generation of
software/hardware interfaces, etc.) and the validation of techniques
developed in compilation tools.</p>
        <p>Compsys started as an Inria project in 2004, after 2 years of maturation.
This first period of Compsys, Compsys I, was positively evaluated in
Spring 2007 after its first 4 years period (2004-2007). It was again
evaluated by AERES in 2009, as part of the general evaluation of Lip, and got
the best possible mark, A+. The second period (2007-2012), Compsys II, was
again evaluated positively by Inria in Spring 2012 and formally prolongated
into Compsys III at the very end of 2012. The geographical move in 2013 of
Fabrice Rastello to Grenoble was first to expand the activities of Compsys in
the context of Giant, a R&amp;D technology center with several industrial and
academic actors. In 2014, this geographical move is a departure from
Compsys, Fabrice Rastello will now work on his own. The research directions of
Compsys III are nevertheless not modified drastically and are in line with
the research directions presented in the synthesis report provided for the
2012 evaluation  (See <a href="http://www.ens-lyon.fr/LIP/COMPSYS/wordpress/wp-content/uploads/2013/09/ficheSynthese.pdf">http://www.ens-lyon.fr/LIP/COMPSYS/wordpress/wp-content/uploads/2013/09/ficheSynthese.pdf</a> ). The shift towards dynamic compilation, underlined in this
report, will be pursued by Fabrice Rastello only, while the shift towards the
compilation of streaming programming, the analysis and optimizations of
parallel languages, with an even stronger focus on polyhedral optimizations
are the heart of Compsys III, as well as the development of the Zettice
start-up in which Christophe Alias is involved. The hiring of Laure Gonnord also adds
new forces on the code analysis research aspects.</p>
        <p>Section <a title="General Presentation" href="./uid6.html">
	2.2</a>  defines the
general context of the team's activities.
Section <a title="Summary of Compsys I Achievements" href="./uid11.html">
	2.3</a>  presents the research
objectives and main achievements in Compsys I, i.e., until 2007, and how
its research directions were modified for Compsys II.
Section <a title="Quick view of Compsys II&#10;Achievements and directions for Compsys III" href="./uid17.html">
	2.4</a>  briefly presents the
main achievements of Compsys II, referring to the annual reports from 2008
to 2012 for details. Finally,
Section <a title="Highlights of the Year" href="./uid20.html">
	2.5</a>  highlights the main
novelties of the past year, i.e., 2013.</p>
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