CAIRN - 2011

Project Team Cairn


Project Team Cairn


Section: Partnerships and Cooperations

European Initiatives

FP7 Projects

  • Program: FP7-ICT-2011-7

  • Project acronym: Flextiles

  • Duration: Oct. 2011 - Sep. 2014

  • Coordinator: Thales

  • Other partners: Thales (FR), UR1 (FR), KIT (GE), TU/e (NL), CSEM (SW), CEA LETI (FR), Sundance (UK)

  • Project title: Self Adaptive Heterogeneous Manycore Based on Flexible Tiles

  • Abstract: A major challenge in computing is to leverage multi-core technology to develop energy-efficient high performance systems. This is critical for embedded systems with a very limited energy budget as well as for supercomputers in terms of sustainability. Moreover the efficient programming of multi-core architectures, as we move towards manycores with more than a thousand cores predicted by 2020, remains an unresolved issue. The FlexTiles project will define and develop an energy-efficient yet programmable heterogeneous manycore platform with self-adaptive capabilities. The manycore will be associated with an innovative virtualisation layer and a dedicated tool-flow to improve programming efficiency, reduce the impact on time to market and reduce the development cost by 20 to 50%. FlexTiles will raise the accessibility of the manycore technology to industry - from small SMEs to large companies - thanks to its programming efficiency and its ability to adapt to the targeted domain using embedded reconfigurable technologies.

  • Program: FP7-ICT-2011-7

  • Project acronym: Alma

  • Project title: Architecture oriented paraLlelization for high performance embedded Multicore systems using scilAb

  • Duration: Sep. 2011 - Aug. 2014

  • Coordinator: KIT

  • Other partners: KIT (GE), UR1 (FR), Recore Systems (NL), Univ. of Peloponnese (GR), TEI-MES (GR), Intracom SA (GR), Fraunhofer (GE)

  • Abstract: The mapping process of high performance embedded applications to today's multiprocessor system on chip devices suffers from a complex toolchain and programming process. The problem here is the expression of parallelism with a pure imperative programming language which is commonly C. This traditional approach limits the mapping, partitioning and the generation of optimized parallel code, and consequently the achievable performance and power consumption of applications from different domains. The Architecture oriented paraLlelization for high performance embedded Multicore systems using scilAb (ALMA) project aims to bridge these hurdles through the introduction and exploitation of a Scilab-based toolchain which enables the efficient mapping of applications on multiprocessor platforms from high level of abstraction. This holistic solution of the toolchain allows the complexity of both the application and the architecture to be hidden, which leads to a better acceptance, reduced development cost and shorter time-to-market. Driven by the technology restrictions in chip design, the end of Moore's law and an unavoidable increasing request of computing performance, ALMA is a fundamental step forward in the necessary introduction of novel computing paradigms and methodologies. ALMA helps to strengthen the position of the EU in the world market of multiprocessor targeted software toolchains. The challenging research will be achieved by the unique ALMA consortium which brings together industry and academia. High class partners from industry such as Recore and Intracom, will contribute their expertise in reconfigurable hardware technology for multi-core systems-on-chip, software development tools and real world applications. The academic partners will contribute their outstanding expertise in reconfigurable computing and compilation tools development.

Collaborations in European Programs, except FP7

  • Program: ITEA2

  • Project acronym: GEODES

  • Project title: Global Energy Optimization for Distributed Embedded Systems

  • Duration: Sep. 2008 - Aug. 2011

  • Coordinator: Thales

  • Other partners: Thales (FR, IT, NL), Sensaris (FR), CNRS (LEAT and IRISA) (FR), CETMEF/MARTEC (FR), Infineon (AU), Thomson (FR), TUV (AU), UAQ (IT), Phillips (NL), Organo (AU), TI-WMC (NL)

  • Abstract: The GEODES project will provide design techniques, embedded software and accompanying tools needed to face the challenge of allowing long power-autonomy of features rich and connected embedded systems, which are becoming pervasive and whose usage is significantly rising. It approaches this challenge by considering all system levels, and notably emphasizes the distributed system view. GEODES is an ITEA2 project which involves partners from France, Austria, Italy and the Netherlands. In GEODES Cairn will provide to partners the PowWow very power sensor platform including reconfigurable hardware accelerators. CAIRN will also contribute on link and MAC layers strategies to a global optimization of the energy, and define and optimize advanced signal processing, error detection and correction and medium access (MAC) techniques in order to reduce the transmit power as well as the useless listening of the communication media. In particular, the case of cooperative strategies like cooperative MIMO or relaying techniques will be investigated.

Major European Organizations with which Cairn has followed Collaborations

  • Imec (Belgium)

  • Scenario-based fixed-point data format refinement to enable energy-scalable of Software Defined Radios (SDR)

  • University of Erlangen-Nuremberg and Dresden University of Technology (Germany)

  • Massively parallel embedded reconfigurable architectures and on dynamic reconfiguration optimisation in the mesh fabric

  • University of Paderborn (Germany)

  • Spatio-temporal scheduling for reconfigurable systems

  • Lund University (Sweden)

  • Constraints programming approach application in the reconfigurable data-paths synthesis flow

  • Computer Vision and Robotic Group of the Institute for Informatics and Applications at the University of Girona (Spain)

  • Parallel architectures for vision algorithms applied to underwater robot

  • University of Eindhoven (Netherlands)

  • Reconfigurable data-path synthesis

  • University of Leiden (Netherlands)

  • Parallel architecture synthesis

  • Code and Cryptography group of University College Cork (Ireland)

  • Arithmetic operators for cryptography

  • Ecole Polytechnique Fédérale de Lausanne - EPFL (Switzerland)

  • Optimization of systems using fixed-point arithmetic

  • Technical University of Madrid - UPM (Spain)

  • Optimization of systems using fixed-point arithmetic

  • Technical University of Tampere, University of Oulu (Finland)

  • Reconfigurable Video Coding

Thomas Chabrier spent four months in the group of Prof. William P. Marnane at University College Cork, Ireland, from June.