Section: Partnerships and Cooperations

International collaborations

Participants : Loïc Besnard, Adnan Bouakaz, Thierry Gautier, Paul Le Guernic, Sun Ke, Jean-Pierre Talpin.

INRIA associate project POLYCORE

In the frame of three consecutive joint NSF-INRIA and INRIA associated project programs, together with additional funds from INRIA scientific direction, INRIA-Rennes, the University of Rennes, the ARTIST NoE, we have established a long-lasting and scientifically fruitful collaboration with the Fermat Laboratory at Virginia Tech (Pr. Sandeep Shukla) and UC San Diego (Pr. Rajesh Gupta). The collaboration started in 2002 and was prolonged until 2009 with the one-year sabbatical of Sandeep Shukla as invited professor. This collaboration resulted in the joint publication of 10 scientific books and series volumes as well as 22 international journal and conference articles. In the frame of this collaboration, we jointly created the ACM-IEEE MEMOCODE (http://www.memocode-conference.com ) international symposium series as well as the FMGALS international workshop series. Finally, we jointly organized four tutorials. This series of collaborations resulted in a technology transfer of the Polychrony toolset with the launch of the project CodeSyn at Virginia Tech, funded by the US Air Force Research Laboratories (AFRL), and now employs one of our former post-doctorates, Julien Ouy.

Our collaboration is now been renewed in the frame of the 2011 INRIA Associate Project POLYCORE and extended to a key additional partner, the Embedded System Group of Pr. Klaus Schneider at TU Kaiserslautern.

Our joint project starts from an observation that can be shared with anyone how experienced with multi-threaded programming, to acknowledge the difficulty of designing and implementing such software. Resolving concurrency, synchronization, and coordination issues, and tackling the non-determinism germane in multi-threaded software is extremely difficult. Ensuring correctness with respect to the specification and deterministic behavior is however necessary for safe execution of such code on embedded architectures. It is therefore desirable to synthesize multi-threaded code from formal specifications using a provably `correct-by-construction' approach.

In Europe, it has been widely claimed that the embedded software for 'fly-by-wire' was mostly automatically generated using tools based on the synchronous programming models. Unfortunately, software generated in those contexts usually operate in a time-triggered execution model. Such models are simple but way less efficient than multi-threaded software when run on multi-core processors, just because of the periodic synchronization overhead.

While time-triggered programming model simplifies code generation, our shared intuition is that multi-rate event driven execution models are much more efficiently adapted to tackle embedded software design challenges posed by forthcoming heterogeneous multi-core embedded architectures. To this aim, we plan to develop formal models, methods, algorithms and techniques for generating provably correct multi-threaded reactive real-time embedded software for mission-critical applications. For scalable modeling of larger embedded software systems, the specification formalism has to be compositional and hierarchical.

Our proposed formalism entails a model of computation (MoC) based on a multi-rate synchronous data-flow paradigm: Polychrony. It aims at combining the capabilities of Esterel/Quartz (ESG/TUKL) for correctly programming synchronous modules, with the capabilities of Polychrony (INRIA), to give high-level abstractions of complex multi-clocked networks and yet provide powerful communication and scheduling code synthesis, all combined in an application-specific modeling and programming environment, design in collaboration with Virginia Tech and the AFRL (whom we submitted the white-paper of a project proposal for funding in 2012).