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Section: Partnerships and Cooperations

International Initiatives

Inria Associate Teams

HARDIESSE
  • Title: Heterogeneous Accelerators for Reconfigurable DynamIc, Energy efficient, Secure SystEms

  • International Partner (Institution - Laboratory - Researcher):

    • University of Massachusetts at Ahmerst (USA)

  • Duration: 2014 - 2016

  • See also: https://team.inria.fr/cairn/hardiesse/

  • Rapid evolutions of applications and standards require frequent in-the-field system modifications and thus strengthen the need for adaptive devices. This need for a strong flexibility, combined with technology evolution (and the so-called power wall) has motivated the surge towards the use of multiple processor cores on a single chip (MPSoC). While it is now clear that we have entered the multi-core era, it is however indisputable that, especially for energy-efficient embedded systems, these architectures will have to be heterogeneous, by combining processor cores and specialized accelerators. We foresee a need for systems able to continuously adapt themselves to changing environments where software updates alone will not be enough for tackling energy management and error tolerance challenges. We believe that a dynamic and transparent adaptation of the hardware structure is the key to success. Security will also be an important challenge for embedded devices. Protections against physical attacks will have to be integrated in all secured components. In this Associated Team, we will study new reconfigurable structures for such hardware accelerators with specific focus on: energy efficiency, runtime dynamic reconfiguration, security, and verification.

Inria International Partners

Declared Inria International Partners
  • Computer Science Department, Colorado State University in Fort-Collins (USA), Prof. Sanjay Rajopadhye, Loop parallelization, development of high-level synthesis tools, Inria Associate Team (2010-2012).

  • Department of Computer Science, Lund University (Sweden), Prof. Krzysztof Kuchcinski, Hardware accelerators modeling using constraint-based programming.

  • Tampere University of Technology (Finland), Prof. Jarmo Takala, From dataflow-based video applications to embedded multicore platforms.

  • University College Cork (Ireland), Prof. Liam Marnane and Prof. Emanuel Popovici, Arithmetic operators for cryptography, side channel attacks for security evaluation, energy-harvesting sensor networks, and sensor networks for health monitoring.

  • University of Massachusetts at Amherst (USA), Prof. Russel Tessier and Prof. Maciej Ciesielski, Methods and tools for automatic reconfigurable arithmetic circuit generation.

Informal International Partners
  • Imec (Belgium), Optimization of embedded systems using fixed-point arithmetic.

  • Electrical Engineering Department, Indian Institute of Technology Delhi (India), Cooperative and MIMO wireless communications.

  • Ecole Polytechnique Fédérale de Lausanne - EPFL (Switzerland), Optimization of embedded systems using fixed-point arithmetic.

  • Technical University of Madrid - UPM (Spain),

  • Optimization of embedded systems using fixed-point arithmetic.

  • LRTS laboratory, Laval University in Québec (Canada), Architectures for MIMO systems, Wireless Sensor Networks, Inria Associate Team (2006-2008).

  • LSSI laboratory, Québec University in Trois-Rivières (Canada), Design of architectures for digital filters and mobile communications.

  • Department of Electrical and Computer Engineering, University of Patras (Greece), Wireless Sensor Networks, data merging, priority scheduling, loop transformations for memory optimizations.

  • Karlsruhe Institute of Technology - KIT (Germany), Loop parallelization and compilation techniques for embedded multicores.

  • Ruhr - University of Bochum - RUB (Germany), Reconfigurable architectures.

  • University of Science and Technology of Hanoi (Vietnam), Participation of several Cairn 's members in the Master ICT / Embedded Systems.

Participation In other International Programs

CNRS PICS - SPiNaCH (2012 - 2014)
  • Title: Secure and low-Power sensor Networks Circuits for Healthcare embedded applications

  • Principal investigator: Arnaud Tisserand, Olivier Berder, Olivier Sentieys

  • International Partner (Institution - Laboratory - Researcher): Code&Crypto group in University College Cork (Ireland)

  • Duration: 2012 - 2014

  • Biomedical sensor networks may be used more and more in the future. For instance, they allow patient's health-care parameters to be remotely monitored at home. In this project, we plan to address two important challenges in the design of biomedical sensors networks: i) design of low-power sensor devices for embedded autonomous systems (health monitoring, pace-maker...) with long battery life; ii) confidentiality and security aspects and especially with public key cryptography processor that are robust against side channel attacks (measure of the computation time, the power consumption or the electromagnetic radiations of the circuit) and with limited power-energy resources.