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Section: Partnerships and Cooperations

National Initiatives

PIA ELCI

  • Title: Software environment for computation-intensive applications

  • Coordinator: Corinne Marchand (BULL SAS)

  • Corse participants: François Broquedis, Philippe Virouleau

  • Inria Partners: Avalon, Cardamon, Myriads; Realopt, Roma, Storm, Tadaam

  • Other Partners: Algo'Tech, CEA, Cenaero, CERFACS, CORIA, Kitware, Onera, SAFRAN

  • Duration: from Sept. 2014 to March 2018

  • Abstract: The ELCI project main goal is to develop a highly-scalable new software stack to tackle high-end supercomputers, from numerical solvers to programming environments and run-time systems. In particular, the Corse team is studying the scalability of OpenMP run-time systems on large scale shared memory machines through the PhD of Philippe Virouleau, co-advised by researchers from the Corse and AVALON Inria teams. This work intends to propose new approaches based on a compiler/run-time cooperation to improve the execution of scientific task-based programs on NUMA platforms. The PhD of Philippe Virouleau is funded by this project.

IPL ZEP

  • Title: Zero-Power computing systems

  • Coordinator: Kevin Marquet (Inria Socrate)

  • Corse participants: Fabrice Rastello

  • Other Inria Partners: Cairn, Pacap

  • Duration: from Apr. 2017 to Sept. 2019

  • Abstract: The ZEP project addresses the issue of designing tiny computing objects with no battery by combining non-volatile memory (NVRAM), energy harvesting, micro-architecture innovations, compiler optimizations, and static analysis. The main application target is Internet of Things (IoT) where small communicating objects will be composed of this computing part associated to a low-power wake-up radio system. The ZEP project gathers four Inria teams that have a scientific background in architecture, compilation, operating system and low power together with the CEA Lialp and Lisan laboratories of CEA LETI & LIST. The major outcomes of the project will be a prototype harvesting board including NVRAM and the design of a new microprocessor associated with its optimizing compiler and operating system.