Section:
New Results
Co-scheduling HPC workloads on cache-partitioned CMP platforms
Co-scheduling techniques are used to improve the throughput of
applications on chip multiprocessors (CMP), but sharing resources
often generates critical interferences.
In collaboration with ENS Lyon and Georgia Tech, we looked at the
interferences in the last level of cache (LLC) and use the
Cache Allocation Technology (CAT) recently provided by Intel
to partition the LLC and give each co-scheduled application their
own cache area.
We considered iterative HPC applications running concurrently
and answer the following questions:
(i) how to precisely model the behavior of these applications on the
cache partitioned platform?
and (ii) how many cores and cache fractions should be assigned to
each application to maximize the platform efficiency? Here, platform
efficiency is defined as maximizing the performance either globally,
or as guaranteeing a fixed ratio of iterations per second for each
application.
Through extensive experiments using CAT, we demonstrated the impact
of cache partitioning when multiple HPC application are co-scheduled
onto CMP platforms. [2]
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