EN FR
EN FR




Bibliography

Major publications by the team in recent years
  • 1C. André.

    Syntax and Semantics of the Clock Constraint Specification Language (CCSL), INRIA, 05 2009, RR-6925.

    http://hal.inria.fr/inria-00384077/en/
  • 2C. André, J. deantoni, F. Mallet, R. de Simone.

    The Time Model of Logical Clocks available in the OMG MARTE profile, in: Synthesis of Embedded Software: Frameworks and Methodologies for Correctness by Construction, S. K. Shukla, J.-P. Talpin (editors), Springer Science+Business Media, LLC 2010, Jul 2010, p. 201–227, Chapter 7.

    http://hal.inria.fr/inria-00495664
  • 3C. André, F. Mallet, R. de Simone.

    Modeling Time(s), in: MoDELS'2007 10th Intern. Conf. on Model Driven Engineering Languages and Systems, 2007.
  • 4A. Benveniste, P. Caspi, S. Edwards, N. Halbwachs, P. Le Guernic, R. de Simone.

    Synchronous Languages Twelve Years Later, in: Proceedings of the IEEE, January 2003.
  • 5J. Boucaron, A. Coadou, R. de Simone.

    Formal Modeling of Embedded Systems with Explicit Schedules and Routes, in: Synthesis of Embedded Software: Frameworks and Methodologies for Correctness by Construction, S. K. Shukla, J.-P. Talpin (editors), Springer Science+Business Media, LLC 2010, Jul 2010, p. 41–78, Chapter 2.

    http://hal.inria.fr/inria-00495667
  • 6J. Boucaron, R. de Simone, J.-V. Millo.

    Latency-insensitive design and central repetitive scheduling, in: MEMOCODE, 2006, p. 175-183.

    http://dx.doi.org/10.1109/MEMCOD.2006.1695923
  • 7L. Cucu-Grosjean, N. Pernet, Y. Sorel.

    Periodic real-time scheduling: from deadline-based model to latency-based model, in: Annals of Operations Research, 2007.

    http://www-rocq.inria.fr/syndex/publications/pubs/aor07/aor07.pdf
  • 8T. Grandpierre, C. Lavarenne, Y. Sorel.

    Optimized Rapid Prototyping For Real-Time Embedded Heterogeneous multiprocessors, in: Proceedings of 7th International Workshop on Hardware/Software Co-Design, CODES'99, 1999.
  • 9T. Grandpierre, Y. Sorel.

    From Algorithm and Architecture Specification to Automatic Generation of Distributed Real-Time Executives: a Seamless Flow of Graphs Transformations, in: Proceedings of First ACM and IEEE International Conference on Formal Methods and Models for Codesign, MEMOCODE'03, Mont Saint-Michel, France, June 2003.

    http://www-rocq.inria.fr/syndex/publications/pubs/memocode03/memocode03.pdf
  • 10P. Meumeu Yomsi, Y. Sorel.

    Extending Rate Monotonic Analysis with Exact Cost of Preemptions for Hard Real-Time Systems, in: Proceedings of 19th Euromicro Conference on Real-Time Systems, ECRTS'07, Pisa, Italy, July 2007.

    http://www-rocq.inria.fr/syndex/publications/pubs/ecrts07/ecrts07.pdf
  • 11D. Potop-Butucaru, Benoît. Caillaud.

    Correct-by-Construction Asynchronous Implementation of Modular Synchronous Specifications, in: Fundam. Inf., January 2007, vol. 78, p. 131–159.

    http://portal.acm.org/citation.cfm?id=1366007.1366013
  • 12D. Potop-Butucaru, R. de Simone, Y. Sorel.

    From Synchronous Specifications to Statically-Scheduled Hard Real-Time Implementations, in: Synthesis of Embedded Software: Frameworks and Methodologies for Correctness by Construction, S. K. Shukla, J.-P. Talpin (editors), Springer Science+Business Media, LLC 2010, Jul 2010, p. 229–262, Chapter 8.

    http://hal.inria.fr/inria-00495666
  • 13D. Potop-Butucaru, S. Edwards, G. Berry.

    Compiling Esterel, Springer, 2007.
  • 14D. Potop-Butucaru, R. de Simone.

    Optimizations for Faster Execution of Esterel Programs, in: MEMOCODE'03, 2003.
  • 15R. de Simone, D. Potop-Butucaru, Jean-Pierre. Talpin.

    The Synchronous Hypothesis and Synchronous Languages, in: Embedded Systems Handbook, CRC Press, 2005, chap. 8.
Publications of the year

Doctoral Dissertations and Habilitation Theses

  • 16J.-F. Le Tallec.

    Extraction de modèles pour la conception de systèmes sur puce, Université de Nice Sophia Antipolis, january 2012.

Articles in International Peer-Reviewed Journal

  • 17K. Deschinkel, Sid-Ahmed-Ali. Touati, S. Briais.

    SIRALINA: efficient two-steps heuristic for storage optimisation in single period task scheduling, in: Journal of Combinatorial Optimization, 2011, vol. 22, no 4, p. 819-844. [ DOI : 10.1007/s10878-010-9332-8 ]

    http://hal.inria.fr/inria-00636028/en/
  • 18L. George, P. Courbin, Y. Sorel.

    Job vs. portioned partitioning for the earliest deadline first semi-partitioned scheduling, in: Journal of Systems Architecture, 2011, vol. 57, no 5, p. 518 - 535.

    http://www-rocq.inria.fr/syndex/publications/pubs/jsa11/jsa11.pdf
  • 19F. Mallet, C. André, R. de Simone.

    Logical Time: observation vs. implementation, in: ACM SIGSOFT Software Engineering Notes, January 2011, vol. 36, no 1, p. 1–8. [ DOI : 10.1145/1921532.1921554 ]

    http://hal.inria.fr/inria-00576647/en
  • 20D. Potop-Butucaru, Y. Sorel, R. de Simone, J.-P. Talpin.

    From concurrent multi-clock programs to deterministic asynchronous implementations, in: Fundamenta Informaticae, 2011, vol. 108, no 1-2, p. 91-118.

    http://www-rocq.inria.fr/syndex/publications/pubs/fi11/fi11.pdf

Invited Conferences

International Conferences with Proceedings

  • 22X. Chen, J. Liu, F. Mallet, Z. Jin.

    Modeling Timing Requirements in Problem Frames Using CCSL, in: 18th Asia Pacific Software Engineering Conference (APSEC'11), Ho Chi Minh Ville, Vietnam, december 2011.
  • 23K. Garcés, J. Deantoni, F. Mallet.

    A Model-Based Approach for Reconciliation of Polychronous Execution Traces, in: SEAA 2011 - 37th EUROMICRO Conference on Software Engineering and Advanced Applications, Oulu, Finland, IEEE, August 2011.

    http://hal.inria.fr/inria-00597981/en
  • 24R. Gascon, F. Mallet, J. Deantoni.

    Logical time and temporal logics: comparing UML MARTE/CCSL and PSL, in: 18th International Symposium on Temporal Representation and Reasoning (TIME'11), Lubeck, Germany, September 2011.

    http://hal.inria.fr/hal-00597086/en
  • 25J.-F. Le Tallec, R. de Simone.

    SCIPX: a SystemC to IP-XACT extraction tool, in: ESLsyn : Electronic System Level Synthesis Conference, San Diego, United States, June 2011.

    http://hal.inria.fr/inria-00601843/en
  • 26J.-F. Le Tallec, J. Deantoni, R. de Simone, B. Ferrero, F. Mallet, L. Maillet-Contoz.

    Combining SystemC, IP-XACT and UML/MARTE in model-based SoC design, in: Workshop on Model Based Engineering for Embedded Systems Design (M-BED 2011), Grenoble, France, March 2011.

    http://hal.inria.fr/inria-00601840/en
  • 27M. Marouf, L. George, Y. Sorel.

    Schedulability analysis for a combination of preemptive strict periodic tasks and sporadic tasks, in: Proceedings of the 10th Workshop on Models and Algorithms for Planning and Scheduling Problems, MAPSP'11, Nymburk, Czech Republic, June 2011.

    http://www-rocq.inria.fr/syndex/publications/pubs/mapsp11/mapsp11.pdf
  • 28M. Marouf, Y. Sorel.

    Scheduling non-preemptive hard real-time tasks with strict periods, in: Proceedings of 16th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA'11, Toulouse, France, September 2011.

    http://www-rocq.inria.fr/syndex/publications/pubs/etfa11/etfa11.pdf
  • 29F. Ndoye, Y. Sorel.

    Preemptive Multiprocessor Real-Time Scheduling with Exact Preemption Cost, in: Proceedings of 5th Junior Researcher Workshop on Real-Time Computing, JRWRTC'11, in conjunction with the 18th International conference on Real-Time and Network Systems, RTNS'11, Nantes, France, September 2011.

    http://www-rocq.inria.fr/syndex/publications/pubs/jrwrtc11/jrwrtc11.pdf
  • 30V. Papailiopoulou, D. Potop-Butucaru, Y. Sorel, R. de Simone, L. Besnard, J.-P. Talpin.

    From concurrent multi-clock programs to concurrent multi-threaded implementations, in: ESLsyn : Electronic System Level Synthesis Conference, San Diego, United States, June 2011.
  • 31M.-A. Peraldi-Frati, J. Deantoni.

    Scheduling Multi Clock Real Time Systems: From Requirements to Implementation, in: International Symposium on Object/Component/Service-oriented Real-time Distributed Computing, Newport Beach, United States, IEEE computer society, March 2011, 50; 57 p, NewPort Beach. [ DOI : 10.1109/ISORC.2011.16 ]

    http://hal.inria.fr/inria-00586851/en
  • 32M.-A. Peraldi-Frati, D. Karlsson, A. Hamann, S. Kuntz, J. Nordlander.

    The TIMMO-2-USE project: Time modeling and analysis to use, in: ERTS2012 International Congres on Embedded Real Time Software and Systems, Toulouse, France, February 2012, 10 pages.

    http://hal.inria.fr/hal-00649781/en/
  • 33L. Yin, F. Mallet, J. Liu, R. de Simone.

    Verification of MARTE/CCSL Time Requirements in Promela/SPIN, in: 16th IEEE International Conference on Engineering of Complex Computer Systems, ICECCS 2011, 2011, p. 65–74.

    http://dx.doi.org/10.1109/ICECCS.2011.14

National Conferences with Proceeding

  • 34L. Cucu-Grosjean, Y. Sorel.

    A schedulability test for real-time dependant periodic task systems with latency constraints, in: 12e congrès annuel de la Société française de Recherche Opérationnelle et d'Aide à la Décision, Saint Etienne, France, March 2011.

    http://hal.inria.fr/inria-00584253/en
  • 35F. Fauberteau, L. George, D. Masson, S. Midonnet.

    Ordonnancement multiprocesseur global basé sur la laxité avec migrations restreintes, in: ROADEF'11 - 12ème congrès annuel de la Société française de Recherche Opérationnelle et d'Aide à la Décision, Saint-Étienne, France, 2011, 2 pp. p.

    http://hal.inria.fr/hal-00620394/en
  • 36C. Gomez, J. Deantoni, F. Mallet.

    Semantic Multi-View model for Low-Power, in: Journées nationales IDM, CAL, et du GDR GPL, Lille, France, June 2011, 19 p, 5 pages.

    http://hal.inria.fr/hal-00596239/en

Conferences without Proceedings

  • 37L. Santinelli, L. Cucu-Grosjean, L. George.

    Probabilistic Sensitivity Analysis, in: the 2nd International Real-Time Scheduling Open Problems Seminar (RTSOPS 2011), Porto, Portugal, July 2011.

    http://hal.inria.fr/hal-00646999/en

Scientific Books (or Scientific Book chapters)

  • 38C. Glitia, J. deantoni, F. Mallet.

    Logical Time @ Work: Capturing Data Dependencies and Platform Constraints, in: System Specification and Design Languages, T. J. J. Kaźmierski, A. Morawiec (editors), Lecture Notes in Electrical Engineering, Springer New York, 2012, vol. 106, p. 223–238.

    http://dx.doi.org/10.1007/978-1-4614-1427-8_14
  • 39F. Mallet.

    Logical Time @ Work for the Modeling and Analysis of Embedded Systems, LAP LAMBERT Academic Publishing, January 2011.

    http://hal.inria.fr/inria-00561247/en

Internal Reports

  • 40C. André.

    Modèles de temps et de contraintes temporelles de MARTE et leurs applications, INRIA, November 2011, no RR-7788, Cours donné à l'École d'été temps réel - Brest - Août 2011.

    http://hal.inria.fr/hal-00639211/en/
  • 41T. Carle, D. Potop-Butucaru.

    Throughput Optimization by Software Pipelining of Conditional Reservation tables, INRIA, April 2011, no RR-7606.

    http://hal.inria.fr/inria-00587319/en
  • 42R. Gascon, F. Mallet, J. Deantoni.

    Logical time and temporal logics: Comparing UML MARTE/CCSL and PSL, INRIA, January 2011, no RR-7459.

    http://hal.inria.fr/inria-00540738/en
  • 43P. Meumeu Yomsi, Y. Sorel.

    An Algebraic Approach for Fixed-Priority Scheduling of Hard Real-time Systems with Exact Preemption Cost, INRIA, 2011, no RR-7702.

    http://hal.inria.fr/inria-00613347/en
  • 44V. Papailiopoulou, D. Potop-Butucaru, Y. Sorel, R. de Simone, L. Besnard, J.-P. Talpin.

    From concurrent multi-clock programs to concurrent multi-threaded implementations, INRIA, March 2011, no RR-7577.

    http://hal.inria.fr/inria-00578585/en
References in notes
  • 45F. Baccelli, G. Cohen, Geert Jan. Olsder, Jean-Pierre. Quadrat.

    Synchronization and Linearity: an algebra for discrete event systems, John Wiley & Sons, 1992.

    http://cermics.enpc.fr/~cohen-g/SED/book-online.html
  • 46A. Benveniste, G. Berry.

    The Synchronous Approach to Reactive and Real-Time Systems, in: Proceedings of the IEEE, September 1991, vol. 79, no 9, p. 1270-1282.
  • 47J. Carlier, P. Chrétienne.

    Problèmes d'ordonnancement, Masson, 1988.
  • 48L. Carloni, K. McMillan, A. Sangiovanni-Vincentelli.

    Theory of Latency-Insensitive Design, in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2001.
  • 49A. Cohen, M. Duranton, C. Eisenbeis, C. Pagetti, F. Plateau, M. Pouzet.

    N-Synchronous Kahn Networks: a Relaxed Model of Synchrony for Real-Time Systems, in: ACM International Conference on Principles of Programming Languages (POPL'06), Charleston, South Carolina, USA, January 2006.
  • 50J.B. Dennis.

    First Version of a Dataflow Procedure Language, in: Lecture Notes in Computer Sci., Springer-Verlag, 1975, vol. 19, p. 362-376.
  • 51S. Edwards.

    Languages for Digital Embedded Systems, Kluwer, 2000.
  • 52N. Halbwachs.

    Synchronous Programming of Reactive Systems, in: Computer Aided Verification, 1998, p. 1-16.

    http://www-verimag.imag.fr/~halbwach/newbook.pdf
  • 53H. Heinecke.

    AUTOSAR, an industrywide initiative to manage the complexity of emerging Automotive E/E-Architecture, in: Electronic Systems for Vehicles 2003, VDI Congress, Baden-Baden, 2003.
  • 54Edward A. Lee, D. G. Messerschmitt.

    Static Scheduling of Synchronous Data Flow Programs for Digital Signal Processing, in: IEEE Trans. Computers, 1987.
  • 55C.L. Liu, J.W. Layland.

    Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment, in: Journal of the ACM, 1973.