Bibliography

Major publications by the team in recent years

1D. Chillet, A. Eiche, S. Pillement, O. Sentieys.

Real-time scheduling on heterogeneous system-on-chip architectures using an optimised artificial neural network, in: Journal of Systems Architecture - Embedded Systems Design, April 2011, vol. 57, n^o 4, p. 340-353.

http://dx.doi.org/10.1016/j.sysarc.2011.01.004
2L. Collin, O. Berder, P. Rostaing, G. Burel.

Optimal Minimum Distance Based Precoder for MIMO Spatial Multiplexing Systems, in: IEEE Transactions on Signal Processing, March 2004, vol. 52, n^o 3.
3A. Courtay, O. Sentieys, J. Laurent, N. Julien.

High-level Interconnect Delay and Power Estimation, in: Journal of Low Power Electronics (JOLPE), 2008, vol. 4, n^o 1, p. 21-33.
4R. David, S. Pillement, O. Sentieys.

Energy-Efficient Reconfigurable Processsors, in: Low Power Electronics Design, C. Piguet (editor), Computer Engineering, Vol 1, CRC Press, August 2004, chap. 20.
5S. Derrien, P. Quinton.

Parallelizing HMMER for Hardware Acceleration on FPGAs, in: 18th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2007), Montreal, Canada, July 2007, p. 10–18, Best Paper Award.
6S. Derrien, S. Rajopadhye, P. Quinton, T. Risset.

High-Level Synthesis of Loops Using the Polyhedral Model: The MMAlpha Software, in: High-Level Synthesis From Algorithm to Digital Circuit, P. Coussy, A. Morawiec (editors), Springer Netherlands, 2008, p. 215-230.

http://dx.doi.org/10.1007/978-1-4020-8588-8
7L. Imbert, A. Peirera, A. Tisserand.

A Library for Prototyping the Computer Arithmetic Level in Elliptic Curve Cryptography, in: Proc. Advanced Signal Processing Algorithms, Architectures and Implementations XVII, San Diego, California, U.S.A., F. T. Luk (editor), SPIE, August 2007, vol. 6697, n^o 66970N, p. 1–9.

http://dx.doi.org/10.1117/12.733652
8B. Le Gal, E. Casseau, S. Huet.

Dynamic Memory Access Management for High-Performance DSP Applications Using High-Level Synthesis, in: IEEE Transactions on Very Large Scale Integration Systems, November 2008, vol. 16, n^o 11, p. 1454-1464.
9K. Martin, C. Wolinski, K. Kuchcinski, A. Floch, F. Charot.

Constraint-Driven Instructions Selection and Application Scheduling in the DURASE system, in: Proc. of the 20th IEEE International Conference on Application-Specific Systems, Architectures and Processors, Boston, MA, USA, IEEE Computer Society, July 2009, p. 145-152.
10D. Menard, D. Chillet, O. Sentieys.

Floating-to-fixed-point Conversion for Digital Signal Processors, in: EURASIP Journal on Applied Signal Processing (JASP), Special Issue Design Methods for DSP Systems, 2006, vol. 2006, n^o 1, p. 1–15.
11D. Menard, O. Sentieys.

Automatic Evaluation of the Accuracy of Fixed-point Algorithms, in: IEEE/ACM Design, Automation and Test in Europe (DATE-02), Paris, March 2002.
12S. Pillement, O. Sentieys, R. David.

DART: A Functional-Level Reconfigurable Architecture for High Energy Efficiency, in: EURASIP Journal on Embedded Systems (JES), 2008, p. 1-13, Article ID 562326, 13 pages.
13C. Plapous, C. Marro, P. Scalart.

Improved signal-to-noise ratio estimation for speech enhancement, in: IEEE Transactions on Speech and Audio Processing, 2006, vol. 14, n^o 6.
14A. Tisserand.

High-Performance Hardware Operators for Polynomial Evaluation, in: Int. J. High Performance Systems Architecture, March 2007, vol. 1, n^o 1, p. 14–23, invited paper.

http://dx.doi.org/10.1504/IJHPSA.2007.013288
15C. Wolinski, K. Kuchcinski, E. Raffin.

Automatic Design of Application-Specific Reconfigurable Processor Extensions with UPaK Synthesis Kernel, in: ACM Transactions on Design Automation of Electronic Systems, 2009, vol. 15, n^o 1, p. 1–36.

http://doi.acm.org/10.1145/1640457.1640458

Publications of the year

Doctoral Dissertations and Habilitation Theses

16N. Abbas.

Acceleration of a Bioinformatics Application using High-Level Synthesis, University of Rennes 1, May 2012.
17A. Banciu.

A Stochastic Approach for the Range Evaluation, University of Rennes 1, February 2012.
18O. Berder.

Systèmes multi-antennes et optimisation énergétique des réseaux de capteurs sans fil, University of Rennes 1, December 2012, Habilitation à Diriger des Recherches.
19A. Eiche.

Real-Time Scheduling for Heterogeneous and Reconfigurable Architectures using Neural Network Structures, University of Rennes 1, September 2012.
20A. Floc'h.

Compilation optimisante pour processeurs extensibles, University of Rennes 1, June 2012.

http://tel.archives-ouvertes.fr/tel-00726420
21Q.-T. Ngo.

Generalized minimum Euclidean distance based precoders for MIMO spatial multiplexing systems, University of Rennes 1, January 2012.
22D. Pamula.

Arithmetic Operators on GF( $2^{m}$ ) for Cryptographic Applications: Performance - Power Consumption - Security Tradeoffs, University of Rennes 1 and Silesian University of Technology, December 2012.
23K. Parashar.

System-level approaches for fixed-point refinement of signal processing algorithms, University of Rennes 1, December 2012.
24L. Q. V. Tran.

Energy-efficient cooperative relay protocols for wireless sensor networks, University of Rennes 1, December 2012.
25C. Xiao.

Custom Operator Identification for High-level Synthesis, University of Rennes 1, November 2012.

Articles in International Peer-Reviewed Journals

26M. M. Alam, O. Berder, D. Menard, O. Sentieys.

TAD-MAC: traffic-aware dynamic MAC protocol for wireless body area sensor networks, in: IEEE Journal on Emerging and Selected Topics in Circuits and Systems, March 2012, vol. 2, n^o 1, p. 109 -119. [ DOI : 10.1109/JETCAS.2012.2187243 ]

http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6163385
27R. B. Atitallah, E. Senn, D. Chillet, M. Lanoe, D. Blouin.

An Efficient Framework for Power Aware Design of Heterogeneous MPSoC, in: IEEE Transactions on Industrial Informatics, November 2012, vol. PP, n^o 99.

http://dx.doi.org/10.1109/TII.2012.2198657
28G. Caffarena, O. Sentieys, D. Menard, J.-A. Lopez, D. Novo.

Quantization of VLSI digital signal processing systems, in: EURASIP Journal on Advances in Signal Processing, February 2012, vol. 2012, p. 1-2.

http://hal.inria.fr/hal-00743410
29E. Casseau, B. Le Gal.

Design of multi-mode application-specific cores based on high-level synthesis, in: Integration, the VLSI Journal, 2012, vol. 45, n^o 1, p. 9–21. [ DOI : 10.1016/j.vlsi.2011.07.003 ]

http://www.sciencedirect.com/science/article/pii/S0167926011000617
30J.-M. Jézéquel, B. Combemale, S. Derrien, C. Guy, S. Rajopadhye.

Bridging the Chasm Between MDE and the World of Compilation, in: Journal of Software and Systems Modeling (SoSyM), October 2012, vol. 11, n^o 4, p. 581-597. [ DOI : 10.1007/s10270-012-0266-8 ]

http://hal.inria.fr/hal-00717219
31S. Khan, E. Casseau.

High-performance motion estimation operator using multimedia oriented subword parallelism, in: Journal of Communication and Computer, 2012, vol. 9, n^o 1, p. 1–14.

http://www.davidpublishing.com/show.html?3593, http://hal.inria.fr/hal-00746875
32K. Martin, C. Wolinski, K. Kuchcinski, A. Floch, F. Charot.

Constraint Programming Approach to Reconfigurable Processor Extension Generation and Application Compilation, in: ACM transactions on Reconfigurable Technology and Systems (TRETS), June 2012, vol. 5, n^o 2, p. 1-38.

http://doi.acm.org/10.1145/2209285.2209289
33D. Menard, O. Sentieys, N. Hervé, H.-N. Nguyen.

High-Level Synthesis under Fixed-Point Accuracy Constraint, in: Journal of Electrical and Computer Engineering (JECE), March 2012, vol. 2012, n^o Article ID 906350, p. 1-14. [ DOI : 10.1155/2012/906350 ]

http://www.hindawi.com/journals/jece/2012/906350
34J.-C. Naud, D. Menard, G. Caffarena, O. Sentieys.

A Discrete Model for Correlation Between Quantization Noises, in: IEEE Transactions on Circuits and Systems. Part II, Express Briefs, December 2012.

http://hal.inria.fr/hal-00743413
35Q.-T. Ngo, O. Berder, P. Scalart.

Minimum Euclidean Distance Based Precoders for MIMO Systems Using Rectangular QAM Modulations, in: IEEE Transactions on Signal Processing, March 2012, vol. 60, n^o 3, p. 1527 -1533. [ DOI : 10.1109/TSP.2011.2177972 ]

http://hal.inria.fr/hal-00741554
36Q.-T. Ngo, O. Berder, P. Scalart.

Minimum Euclidean Distance Based Precoding for Three-Dimensional Multiple-Input Multiple-Ouput Spatial Multiplexing Systems, in: IEEE Transactions on Wireless Communications, 2012, vol. 11, n^o 7, p. 2486 - 2495.

http://hal.inria.fr/hal-00741559
37Q.-T. Ngo, O. Berder, P. Scalart.

General minimum Euclidean distance based precoder for MIMO wireless systems, in: EURASIP Journal on Advances in Signal Processing, 2013, to appear.
38A. Pasha, S. Derrien, O. Sentieys.

System Level Synthesis for Wireless Sensor Node Controllers: A Complete Design Flow, in: ACM Transactions on Design Automation of Electronic Systems (TODAES), January 2012, vol. 17, n^o 1, p. 2.1–2.24. [ DOI : 10.1145/2071356.2071358 ]

http://dl.acm.org/citation.cfm?id=2071358
39M. Pham, S. Pillement, S. Piestrak.

Low Overhead Fault-Tolerance Technique for Dynamically Reconfigurable Softcore Processor, in: IEEE Transactions on Computers, 2012, vol. 99, n^o PrePrints.

http://dx.doi.org/10.1109/TC.2012.55
40E. Raffin, C. Wolinski, F. Charot, E. Casseau, A. Floch, K. Kuchcinski, S. Chevobbe, S. Guyetant.

Scheduling, Binding and Routing System for a Run-Time Reconfigurable Operator Based Multimedia Architecture, in: Journal of Embedded and Real-Time Communication Systems, January 2012, vol. 3, n^o 1, p. 1–30. [ DOI : 10.4018/jertcs.2012010101 ]

http://hal.inria.fr/hal-00663458
41R. Rocher, D. Ménard, O. Sentieys, P. Scalart.

Analytical Approach for Numerical Accuracy Estimation of Fixed-Point Systems Based on Smooth Operations, in: IEEE Transactions on Circuits and Systems. Part I, Regular Papers, October 2012, vol. 59, n^o 10, p. 2326 - 2339. [ DOI : 10.1109/TCSI.2012.2188938 ]

http://hal.inria.fr/hal-00741741
42C. Xiao, E. Casseau.

Exact Custom Instruction Enumeration for Extensible Processors, in: Integration, the VLSI Journal, 2012, vol. 45, n^o 2, p. 263–270. [ DOI : 10.1016/j.vlsi.2011.11.011 ]

http://www.sciencedirect.com/science/article/pii/S0167926011001003
43R. Zhang, O. Berder, J.-M. Gorce, O. Sentieys.

Energy-Delay Tradeoff in Wireless Multihop Networks with Unreliable Links, in: Ad Hoc Networks, 2012, vol. 10, n^o 7, p. 1306 -1321.

http://hal.inria.fr/hal-00741560

Articles in National Peer-Reviewed Journals

44J.-C. Naud, D. Menard, O. Sentieys.

Évaluation de la précision en virgule fixe dans le cas des structures conditionnelles, in: Revue Techniques et Sciences Informatiques, RTSI, December 2012.

http://hal.inria.fr/hal-00743415

Invited Conferences

45E. Casseau.

ROMA: reconfigurable-operator based architecture for multimedia applications, in: International Symposium on System-on-Chip (SoC), October 2012.

http://hal.inria.fr/hal-00746878
46D. Chillet.

An Overview of Design Problematics for Embedded Systems, in: 15th National Symposium on Selected ICT Problems, Hanoi, Viet Nam, University of Science and Technology of Hanoi, December 2012.

http://hal.inria.fr/hal-00759676
47D. Chillet.

Estimation et modélisation de la consommation des architectures reconfigurables et du concept de reconfiguration dynamique, in: Colloque du GDR SoC SiP, Paris, France, June 2012.

International Conferences with Proceedings

48M. M. Alam, O. Berder, D. Menard, O. Sentieys.

Latency-Energy Optimized MAC Protocol for Body Sensor Networks, in: Ninth International Conference on Wearable and Implantable Body Sensor Networks (BSN), May 2012, p. 67 -72. [ DOI : 10.1109/BSN.2012.8 ]

http://hal.inria.fr/hal-00741558
49J. Becker, M. Huebner, T. Stripf, O. Oey, S. Derrien, D. Ménard, O. Sentieys, G. Rauwerda, K. Sunesen, D. Kritharidis, C. Valouxis, G. Goulas, P. Alefragis, N. S. Voros, G. Dimitroulakos, N. Mitas, D. Goehringer.

From Scilab To High Performance Embedded Multicore Systems - The ALMA Approach, in: Proc. 15th EUROMICRO Conference on Digital System Design (DSD), Cesme, Izmir, Turquie, 2012.

http://hal.inria.fr/hal-00752642
50D. Benferhat, F. Guidec, P. Quinton.

Cardiac Monitoring of Marathon Runners using Disruption-Tolerant Wireless Sensors, in: 6th Springer Int. Conf. on Ubiquitous Computing and Ambiant Intelligence (UCAmI'12), Victoria-Gasteiz, Spain, LNCS, Springer, December 2012.

http://hal.inria.fr/hal-00763319
51D. Benferhat, F. Guidec, P. Quinton.

Disruption-Tolerant Wireless Sensor Networking for Biomedical Monitoring in Outdoor Conditions, in: 7th ACM Int. Conf. on Body Area Networks (BodyNets'12), Oslo, Norway, ACM, September 2012.

http://hal.inria.fr/hal-00763305
52R. Bonamy, D. Chillet, S. Bilavarn, O. Sentieys.

Power Consumption Model for Partial Dynamic Reconfiguration, in: Proc. of International Conference on ReConFigurable Computing and FPGA (RECONFIG), Cancun, Mexico, December 2012.
53A. Chakhari, K. Parashar, R. Rocher, P. Scalart.

Analytical approach to evaluate the effect of the spread of quantization noise through the cascade of decision operators for spherical decoding, in: Proc. of International Conference on Design and Architectures for Signal and Image Processing (DASIP), October 2012.

http://hal.inria.fr/hal-00741829
54D. Chillet, E. Senn, O. Zendra, C. Belleudy, S. Bilavarn, R. B. Atitallah, C. Samoyeau, A. Fritsch.

Open-People: Open Power and Energy Optimization PLatform and Estimator, in: Proc. of 15th Euromicro Conference on Digital System Design (DSD'2012), Cesme, Izmir, Turkey, October 2012, p. 668-675.
55A. Didioui, C. Bernier, D. Morche, O. Sentieys.

Impact of RF front-end nonlinearity on WSN communications, in: Proc. of the Ninth International Symposium on Wireless Communication Systems (ISWC), Paris, France, November 2012, p. 875-879. [ DOI : 10.1109/ISWCS.2012.6328493 ]
56A. Didioui, C. Bernier, D. Morche, O. Sentieys.

HarvWSNet: A Co-simulation Framework for Energy Harvesting Wireless Sensor Networks, in: Proc. of the International Conference on Computing, Networking and Communications (ICNC), San Diego, USA, January 2013.
57M. Gautier, V. Berg, D. Noguet.

Wideband frequency domain detection using Teager-Kaiser energy operator, in: Proc. of the IEEE 5th International Conference on Cognitive Radio Oriented Wireless Networks and Communications (CrownCom'12), June 2012, p. 332 – 337.

http://hal.inria.fr/hal-00742528
58G. Goulas, P. Alefragis, N. S. Voros, C. Valouxis, C. Gogos, N. Nikolaos, G. Dimitroulakos, K. Masselos, D. Goehringer, S. Derrien, O. Sentieys, D. Ménard, M. Huebner, T. Stripf, O. Oey, J. Becker, G. Rauwerda, K. Sunesen, D. Kritharidis, N. Mitas.

From Scilab to Multicore Embedded Systems: Algorithms and Methodologies, in: Proc. of the IEEE International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (IC-SAMOS), Samos, Grèce, 2012.

http://hal.inria.fr/hal-00752615
59F. Guidec, D. Benferhat, P. Quinton.

Biomedical Monitoring of Non-Hospitalized Subjects using Disruption-Tolerant Wireless Sensors, in: 3rd International Conference on Wireless Mobile Communication and Healthcare (MobiHealth'12), Paris, France, Springer, November 2012.

http://hal.inria.fr/hal-00763316
60C. Guy, B. Combemale, S. Derrien, R. H. Steel, J.-M. Jézéquel.

On Model Subtyping, in: Proc. 8th European Conference on Modelling Foundations and Applications (ECMFA), Kgs. Lyngby, Denmark, July 2012.

http://hal.inria.fr/hal-00695034
61Q. H. Khuat, Q. H. Le, D. Chillet, S. Pillement.

Spatio-Temporal Scheduling for 3D Reconfigurable & Multiprocessor Architecture, in: International Design and Test Symposium, IDT 2012, Doha, Quatar, December 2012.
62T.-N. Le, O. Sentieys, O. Berder, A. Pégatoquet, C. Belleudy.

Power Manager with PID controller in Energy Harvesting Wireless Sensor Networks, in: Proc. of Workshop on energy and Wireless Sensors (e-WiSe), Besançon, France, November 2012.
63F. Lemonnier, P. Millet, G. Marchesan Almeida, M. Huebner, J. Becker, S. Pillement, O. Sentieys, M. Koedam, S. Sinha, K. Goossens, C. Piguet, M. Morgan, R. Lemaire.

Towards future adaptive multiprocessor systems-on-chip: an innovative approach for flexible architectures, in: Proc. IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS), Samos, Greece, July 2012.
64D. Pamula, E. Hrynkiewicz, A. Tisserand.

Analysis of GF( $2^{233}$ ) Multipliers Regarding Elliptic Curve Cryptosystem Applications, in: 11th IFAC/IEEE International Conference on Programmable Devices and Embedded Systems (PDeS), Brno, Czech Republic, May 2012, p. 252-257.
65D. Pamula, A. Tisserand.

GF( $2^{m}$ ) Finite-Field Multipliers with Reduced Activity Variations, in: 4th International Workshop on the Arithmetic of Finite Fields, Bochum, Germany, LNCS, Springer, July 2012, vol. 7369, p. 152-167.

http://dx.doi.org/10.1007/978-3-642-31662-3_11
66M. Pham, R. Bonamy, S. Pillement, D. Chillet.

UPaRC - Ultra-fast power-aware reconfiguration controller, in: Proc. IEEE/ACM Design and Test in Europe Conference (2012), Dresden, Germany, March 2012, p. 1373–1378.
67I. Pratomo, S. Pillement.

Gradient - An Adaptive Fault-tolerant Routing Algorithm for 2D Mesh Network-on-Chips, in: Proc. of International Conference on Design and Architectures for Signal and Image Processing (DASIP), Karlsruhe, Germany, October 2012.
68I. Pratomo, S. Pillement.

Impact of Design Parameters on Performance of Adaptive Network-on-Chips, in: Proc. High Performance Computing and Simulation (HPCS), Madrid, Spain, July 2012, p. 724 – 725.
69P. Quinton, A.-M. Chana, S. Derrien.

Efficient Hardware Implementation of Data-Flow Parallel Embedded Systems, in: 12th Int. Conf. on Embedded Computer Systems: Architectures, Modeling, and Simulation (Samos XII), Samos, Greece, July 2012.
70R. Rocher, P. Scalart.

Noise Probability Density Function in Fixed-Point Systems Based on Smooth Operators, in: Proc. of International Conference on Design and Architectures for Signal and Image Processing (DASIP), October 2012.

http://hal.inria.fr/hal-00741824
71E. Senn, D. Chillet, O. Zendra, C. Belleudy, R. B. Atitallah, A. Fritsch, C. Samoyeau.

Open-People: an Open Platform for Estimation and Optimizations of energy consumption, in: Proc. of International Conference on Design and Architectures for Signal and Image Processing (DASIP), Karlsruhe, Germany, October 2012.
72T. Stripf, O. Oey, T. Bruckschloegl, R. Koenig, M. Huebner, G. Goulas, P. Alefragis, S. Nikolaos, G. Rauwerda, K. Sunesen, S. Derrien, D. Menard, O. Sentieys, N. Kavvadias, G. Dimitroulakos, K. Masselos, D. Goehringer, T. Perschke, D. Kritharidis, N. Mitas, J. Becker.

A Flexible Approach for Compiling Scilab to Reconfigurable Multi-Core Embedded Systems, in: Proc. International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), York, Royaume-Uni, 2012, p. 1-8.

http://hal.inria.fr/hal-00752644
73V. D. Tovinakere, O. Sentieys, S. Derrien.

A Semiemperical Model for Wakeup Time Estimation in Power-Gated Logic Clusters, in: Proc. of the 49th IEEE/ACM Design Automation Conference (DAC), San Francisco, CA, USA, June 2012, p. 48-55.

http://doi.acm.org/10.1145/2228360.2228371

National Conferences with Proceeding

74Q. H. Khuat, Q. H. Le, D. Chillet, S. Pillement.

Spatio-Temporal Scheduling for 3D Reconfigurable and Multiprocessor Architecture, in: Manifestation des Jeunes Chercheurs en Sciences et Technologies de l'Information et de la Communication (MAJECSTIC'2012), Lille, France, October 2012.

Conferences without Proceedings

75Q. H. Khuat, Q. H. Le, D. Chillet, S. Pillement.

Spatio-Temporal Scheduling for 3D Reconfigurable and Multiprocessor Architecture, in: Colloque du GDR SoC SiP, Paris, France, June 2012.
76E. Senn, C. Belleudy, D. Chillet, A. Fritsch, R. B. Atitallah, O. Zendra, C. Samoyeau.

Open-People: Open-Power and Energy Optimization PLatform and Estimator, in: University Booth, Sophia-Antipolis Microelectronics Conference (SAME), Nice, France, October 2012.

Scientific Books (or Scientific Book chapters)

77O. Sentieys, O. Berder.

Optimizing Energy Efficiency of Sensor Networks, in: Energy Autonomous Micro and Nano Systems, M. Belleville, C. Condemine (editors), Wiley-ISTE, 2012, p. 325–360.

http://hal.inria.fr/hal-00742125
78O. Sentieys, O. Berder.

Optimisation énergétique des réseaux de capteurs, in: Micro et Nanosystèmes autonomes en énergie, M. Belleville, C. Condemine (editors), Hermes, 2012.

http://hal.inria.fr/hal-00742126
79O. Sentieys, A. Tisserand.

Architectures reconfigurables FPGA, in: Technologies logicielles Architectures des systèmes, Techniques de l'Ingénieur, August 2012, n^o H 1 196, p. 1-22.
80R. Zhang, O. Berder, O. Sentieys.

Energy-Latency Tradeoff of Opportunistic Routing, in: Routing in Opportunistic Networks, Springer, 2012.

http://hal.inria.fr/hal-00742127

Internal Reports

81J.-C. Naud, D. Menard.

Numerical Accuracy Evaluation for Polynomial Computation, Inria, February 2012, 20 p.

http://hal.inria.fr/hal-00672654

Scientific Popularization

82A. Tisserand.

Énergie dans les puces électroniques, October 2012, Exposé, Fête de la Science, Lannion.

Other Publications

83A. Tisserand.

Circuits for True Random Number Generation with On-Line Quality Monitoring, June 2012, Rencontres Arithmétique de l'Informatique Mathématique, Exposé invité.
84A. Tisserand.

Power Analysis and Cryptosystem Security: Attacks and Countermeasures, May 2012, Cours École Thématique ECOFAC 2012.

http://leat.unice.fr/ECoFaC2012/

References in notes

85S. Hauck, A. DeHon (editors)

Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation, Morgan Kaufmann, 2008.
86Z. Alliance.

Zigbee specification, ZigBee Alliance, 2005, n^o ZigBee Document 053474r06, Version.
87A. Bachir, M. Dohler, T. Watteyne, K. Leung.

MAC Essentials for Wireless Sensor Networks, in: Communications Surveys Tutorials, IEEE, quarter 2010, vol. 12, n^o 2, p. 222 -248.

http://dx.doi.org/10.1109/SURV.2010.020510.00058
88F. Barat, M. Jayapala, T. Vander Aa, R. Lauwereins, G. Deconinck, H. Corporaal.

Low Power Coarse-Grained Reconfigurable Instruction Set Processor, in: International Workshop on Field Programmable Logic and Applications, Lecture Notes in Computer Science, Lecture notes in Computer Science 2778, September 2003, p. 230–239.
89V. Baumgarte, G. Ehlers, F. May, A. Nückel, M. Vorbach, M. Weinhardt.

PACT XPP — A Self-Reconfigurable Data Processing Architecture, in: The Journal of Supercomputing, 2003, vol. 26, n^o 2, p. 167–184.
90C. Bobda.

Introduction to Reconfigurable Computing: Architectures Algorithms and Applications, Springer, 2007.
91J. M. P. Cardoso, P. C. Diniz, M. Weinhardt.

Compiling for reconfigurable computing: A survey, in: ACM Comput. Surv., June 2010, vol. 42, p. 13:1–13:65.

http://doi.acm.org/10.1145/1749603.1749604
92D. Chillet, S. Pillement, O. Sentieys.

A Neural Network Model for Real-Time Scheduling on Heterogeneous SoC Architectures, in: IEEE International Joint Conference on Neural Networks, IJCNN'07, Orlando, FL, August, 12-17 2007.
93M. Clark, M. Mulligan, D. Jackson, D. Linebarger.

Accelerating Fixed-Point Design for MB-OFDM UWB Systems, in: CommsDesign, 2005.

http://www.commsdesign.com/showArticle.jhtml?articleID=57703818
94L. Collin, O. Berder, P. Rostaing, G. Burel.

Optimal minimum distance-based precoder for MIMO spatial multiplexing systems, in: IEEE Transactions on Signal Processing, 2004, vol. 52, n^o 3, p. 617–627.
95K. Compton, S. Hauck.

Reconfigurable computing: a survey of systems and software, in: ACM Comput. Surv., 2002, vol. 34, n^o 2, p. 171–210.

http://doi.acm.org/10.1145/508352.508353
96G. Constantinides, P. Cheung, W. Luk.

Wordlength optimization for linear digital signal processing, in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, October 2003, vol. 22, n^o 10, p. 1432- 1442.
97M. Coors, H. Keding, O. Luthje, H. Meyr.

Fast Bit-True Simulation, in: Proc. ACM/IEEE Design Automation Conference (DAC), Las Vegas, june 2001, p. 708-713.
98S. Cui, A. Goldsmith, A. Bahai.

Energy-efficiency of MIMO and cooperative MIMO techniques in sensor networks, in: IEEE Journal on Selected Areas in Communications, 2004, vol. 22, n^o 6, p. 1089–1098.
99K. Danne, R. Muhlenbernd, M. Platzner.

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