Section: Partnerships and Cooperations

International Initiatives

Inria Associate Teams

HARDIESSE

• Title: Heterogeneous Accelerators for Reconfigurable DynamIc, Energy efficient, Secure SystEms

• International Partner (Institution - Laboratory - Researcher):

  • University of Massachusetts at Ahmerst (United States) - Department of Electrical and Computer Engineering - Prof. Russel Tessier and Prof. Maciej Ciesielski

• Start year: 2014

• See also: https://team.inria.fr/cairn/hardiesse/

• Rapid evolutions of applications and standards require frequent in-the-field system modifications and thus strengthens the need for adaptive devices. This need for a strong flexibility, combined with technology evolution (and the so-called power wall) has motivated the surge towards the use of multiple processor cores on a single chip (MPSoC). While it is now clear that we have entered the multi-core era, it is however indisputable that, especially for energy-efficient embedded systems, these architectures will have to be heterogeneous, by combining processor cores and specialized accelerators. We foresee a need for systems able to continuously adapt themselves to changing environments where software updates alone will not be enough for tackling energy management and error tolerance challenges. We believe that a dynamic and transparent adaptation of the hardware structure is the key to success. Security will also be an important challenge for embedded devices. Protections against physical attacks will have to be integrated in all secured components. In this Associated Team, we will study new reconfigurable structures for such hardware accelerators with specific focus on: energy efficiency, runtime dynamic reconfiguration, security, and verification.

Inria International Partners

Declared Inria International Partners

LRS

• Title: Loop unRolling Stones: compiling in the polyhedral model

• International Partner (Institution - Laboratory - Researcher):

  • Colorado State University (United States) - Department of Computer Science - Prof. Sanjay Rajopadhye

DAVIAP

• Title: From DAtaflow-based VIdeo Appications to embedded multicore Platforms

• International Partner (Institution - Laboratory - Researcher):

  • Tampere University of Technology (Finland) - Department of Pervasive Computing - Prof. Jarmo Takala

HARAMCOP

• Title: Hardware accelerators modeling using constraint-based programming

• International Partner (Institution - Laboratory - Researcher):

  • Lund University (Sweden) - Department of Computer Science - Prof. Krzysztof Kuchcinski

SPINACH

• Title: Secure and low-Power sensor Networks Circuits for Healthcare embedded applications

• International Partner (Institution - Laboratory - Researcher):

  • University College Cork (Ireland) - Department of Electrical and Electronic Engineering - Prof. Liam Marnane and Prof. Emanuel Popovici

• Arithmetic operators for cryptography, side channel attacks for security evaluation, energy-harvesting sensor networks, and sensor networks for health monitoring.

Informal International Partners

• Imec (Belgium), Optimization of embedded systems using fixed-point arithmetic, fault-tolerant computing architectures.

• Ecole Polytechnique Fédérale de Lausanne - EPFL (Switzerland), Optimization of embedded systems using fixed-point arithmetic.

• Technical University of Madrid - UPM (Spain),

• Optimization of embedded systems using fixed-point arithmetic.

• LSSI laboratory, Québec University in Trois-Rivières (Canada), Design of architectures for digital filters and mobile communications.

• Department of Electrical and Computer Engineering, University of Patras (Greece), Wireless Sensor Networks, Data Merging, Priority Scheduling, Loop Transformations for Memory Optimizations.

• Karlsruhe Institute of Technology - KIT (Germany), Loop parallelization and compilation techniques for embedded multicores.

• Ruhr - University of Bochum - RUB (Germany), Reconfigurable architectures.

• University of Science and Technology of Hanoi (Vietnam), Participation of several Cairn 's members in the Master ICT / Embedded Systems.