Bibliography
Publications of the year
Doctoral Dissertations and Habilitation Theses
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1J. Herrmann.
Memory-aware Algorithms and Scheduling Techniques for Matrix Computattions, Ecole normale supérieure de lyon - ENS LYON, November 2015.
https://tel.archives-ouvertes.fr/tel-01241485
Articles in International Peer-Reviewed Journals
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2P. R. Amestoy, C. Ashcraft, O. Boiteau, A. Buttari, J.-Y. L'Excellent, C. Weisbecker.
Improving Multifrontal Methods by Means of Block Low-Rank Representations, in: SIAM Journal on Scientific Computing, 2015, vol. 37, no 3, pp. A1451-A1474. [ DOI : 10.1137/120903476 ]
https://hal.inria.fr/hal-01237169 -
3P. R. Amestoy, I. S. Duff, J.-Y. L'Excellent, F.-H. Rouet.
Parallel computation of entries in A-1, in: SIAM Journal on Scientific Computing, 2015, vol. 37, no 2, pp. C268–C284. [ DOI : 10.1137/120902616 ]
https://hal.inria.fr/hal-01237166 -
4G. Aupy, A. Benoit.
Approximation Algorithms for Energy, Reliability, and Makespan Optimization Problems, in: Parallel Processing Letters, 2015.
https://hal.inria.fr/hal-01252333 -
5G. Aupy, A. Benoit, M. Journault, Y. Robert.
Power-aware replica placement in tree networks with multiple servers per client, in: Sustainable Computing, March 2015, vol. 5, pp. 41-53. [ DOI : 10.1016/j.suscom.2014.08.013 ]
https://hal.inria.fr/hal-01059364 -
6G. Aupy, M. Shantharam, A. Benoit, Y. Robert, P. Raghavan.
Co-scheduling algorithms for high-throughput workload execution, in: Journal of Scheduling, 2015. [ DOI : 10.1007/s10951-015-0445-x ]
https://hal.inria.fr/hal-01252366 -
7A. Benoit, L.-C. Canon, L. Marchal.
Non-clairvoyant reduction algorithms for heterogeneous platforms, in: Concurrency and Computation: Practice and Experience, April 2015, vol. 27, no 6, pp. 1612-1624. [ DOI : 10.1002/cpe.3347 ]
https://hal.inria.fr/hal-01090232 -
8A. Benoit, S. K. Raina, Y. Robert.
Efficient checkpoint/verification patterns, in: International Journal of High Performance Computing Applications, July 2015. [ DOI : 10.1177/1094342015594531 ]
https://hal-ens-lyon.archives-ouvertes.fr/ensl-01252342 -
9G. Bosilca, A. Bouteiller, J. Dongarra, T. Hérault, Y. Robert.
Composing resilience techniques: ABFT, periodic and incremental checkpointing, in: The International Journal of Networking and Computing, March 2015, 18 p.
https://hal.inria.fr/hal-01091930 -
10H. Casanova, F. Dufossé, Y. Robert, F. Vivien.
Mapping Applications on Volatile Resources, in: International Journal of High Performance Computing Applications, February 2015, vol. 29, no 1, 19 p. [ DOI : 10.1177/1094342013518806 ]
https://hal.inria.fr/hal-00923948 -
11H. Casanova, Y. Robert, F. Vivien, D. Zaidouni.
On the impact of process replication on executions of large-scale parallel applications with coordinated checkpointing, in: Future Generation Computer Systems, October 2015, vol. 51, 13 p. [ DOI : 10.1016/j.future.2015.04.003 ]
https://hal.inria.fr/hal-01199752 -
12M. Deveci, K. Kaya, B. Uçar, U. V. Catalyurek.
Hypergraph partitioning for multiple communication cost metrics: Model and methods, in: Journal of Parallel and Distributed Computing, 2015, vol. 77, pp. 69–83. [ DOI : 10.1016/j.jpdc.2014.12.002 ]
https://hal.inria.fr/hal-01159676 -
13F. Dufossé, K. Kaya, B. Uçar.
Two approximation algorithms for bipartite matching on multicore architectures, in: Journal of Parallel and Distributed Computing, 2015, vol. 85, pp. 62-78. [ DOI : 10.1016/j.jpdc.2015.06.009 ]
https://hal.inria.fr/hal-01242516 -
14L. Eyraud-Dubois, L. Marchal, O. Sinnen, F. Vivien.
Parallel scheduling of task trees with limited memory, in: ACM Transactions on Parallel Computing, July 2015, vol. 2, no 2, 36 p. [ DOI : 10.1145/2779052 ]
https://hal.inria.fr/hal-01160118 -
15J. Herrmann, G. Bosilca, T. Hérault, L. Marchal, Y. Robert, J. Dongarra.
Assessing the cost of redistribution followed by a computational kernel: Complexity and performance results, in: Parallel Computing, 2016, vol. 52, 20 p. [ DOI : 10.1016/j.parco.2015.09.005 ]
https://hal.inria.fr/hal-01254167 -
16T. Lambert, L. Marchal, B. Uçar.
Comments on the hierarchically structured bin packing problem, in: Information Processing Letters, 2015, vol. 115, no 2, pp. 306–309. [ DOI : 10.1016/j.ipl.2014.10.001 ]
https://hal.inria.fr/hal-01071414
International Conferences with Proceedings
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17E. Agullo, O. Beaumont, L. Eyraud-Dubois, J. Herrmann, S. Kumar, L. Marchal, S. Thibault.
Bridging the Gap between Performance and Bounds of Cholesky Factorization on Heterogeneous Platforms, in: Heterogeneity in Computing Workshop 2015, Hyderabad, India, May 2015.
https://hal.inria.fr/hal-01120507 -
18P. R. Amestoy, R. Brossier, A. Buttari, J.-Y. L'Excellent, T. Mary, L. Métivier, A. Miniussi, S. Operto, A. Ribodetti, J. Virieux, C. Weisbecker.
Efficient 3D frequency-domain full-waveform inversion of ocean-bottom cable data with sparse block low-rank direct solver: a real data case study from the North Sea, in: SEG Annual meeting, New Orleans, United States, SEG Technical Program Expanded Abstracts 2015, 2015, no 251, pp. 1303-1308. [ DOI : 10.1190/segam2015-5713962.1 ]
https://hal.inria.fr/hal-01239896 -
19P. R. Amestoy, R. Brossier, A. Buttari, J.-Y. L'Excellent, T. Mary, L. Métivier, A. Miniussi, S. Operto, J. Virieux, C. Weisbecker.
3D frequency-domain seismic modeling with a Parallel BLR multifrontal direct solver, in: SEG Annual meeting, New Orleans, United States, SEG Technical Program Expanded Abstracts 2015, 2015, no 692, pp. 3606-3611.
https://hal.inria.fr/hal-01237869 -
20G. Aupy, A. Benoit, H. Casanova, Y. Robert.
Scheduling Computational Workflows on Failure-Prone Platforms, in: 17th Workshop on Advances in Parallel and Distributed Computational Models, Hyderabad, India, 2015 IEEE International Parallel and Distributed Processing Symposium Workshop (APDCM), May 2015. [ DOI : 10.1109/IPDPSW.2015.33 ]
https://hal.inria.fr/hal-01251939 -
21L. Bautista-Gomez, A. Benoit, A. Cavelan, S. K. Raina, Y. Robert, H. Sun.
Which Verification for Soft Error Detection?, in: High Performance Computing 2015, Bangalore, India, December 2015.
https://hal.inria.fr/hal-01252382 -
22A. Cavelan, S. K. Raina, H. Sun, Y. Robert.
Assessing the impact of partial verifications against silent data corruptions, in: ICPP'2015, The Int. Conference on Parallel Processing, Beijing, China, ICPP'2015, The Int. Conference on Parallel Processing, IEEE, 2015.
https://hal.inria.fr/hal-01253493 -
23A. Cavelan, Y. Robert, H. Sun, F. Vivien.
Voltage Overscaling Algorithms for Energy-Efficient Workflow Computations With Timing Errors, in: FTXS '15: 5th Workshop on Fault Tolerance for HPC at eXtreme Scale, Portland, United States, ACM, June 2015, 8 p. [ DOI : 10.1145/2751504.2751508 ]
https://hal.inria.fr/hal-01199250 -
24M. Deveci, K. Kaya, B. Uçar, U. V. Catalyurek.
Fast and high quality topology-aware task mapping, in: 29th IEEE International Parallel & Distributed Processing Symposium, Hyderabad, India, IEEE CPS, May 2015.
https://hal.inria.fr/hal-01159677 -
25M. Fasi, Y. Robert, B. Uçar.
Combining backward and forward recovery to cope with silent errors in iterative solvers, in: PDSEC2015, Hyderabad, India, IPDPSW 2015: 29th IEEE International Parallel & Distributed Processing Symposium Workshops 2015, IEEE CPS, May 2015, pp. 980–989.
https://hal.inria.fr/hal-01159679 -
26A. Gainaru, G. Aupy, A. Benoit, F. Cappello, Y. Robert, M. Snir.
Scheduling the I/O of HPC Applications Under Congestion, in: IEEE International Parallel and Distributed Processing Symposium, IPDPS 2015, Hyderabad, India, May 25-29, 2015, Hyderabad, India, May 2015. [ DOI : 10.1109/IPDPS.2015.116 ]
https://hal.inria.fr/hal-01251938 -
27L. Gonnord, D. Monniaux, G. Radanne.
Synthesis of ranking functions using extremal counterexamples, in: Programming Languages, Design and Implementation, Portland, Oregon, United States, June 2015. [ DOI : 10.1145/2737924.2737976 ]
https://hal.archives-ouvertes.fr/hal-01144622 -
28A. Guermouche, L. Marchal, B. Simon, F. Vivien.
Scheduling Trees of Malleable Tasks for Sparse Linear Algebra, in: European Conference on Parallel Processing (Euro-Par), Vienna, Austria, 2015.
https://hal.inria.fr/hal-01160104 -
29H. Kabir, J. Booth, G. Aupy, A. Benoit, Y. Robert, P. Raghavan.
STS-k: A Multilevel Sparse Triangular Solution Scheme for NUMA Multicores, in: Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis, SC 2015, Austin, TX, USA, November 15-20, 2015, Austin, United States, November 2015, 11 p. [ DOI : 10.1145/2807591.2807667 ]
https://hal.inria.fr/hal-01251937 -
30O. Kaya, B. Uçar.
Scalable sparse tensor decompositions in distributed memory systems, in: International Conference for High Performance Computing, Networking, Storage and Analysis (SC15), Austin, TX, United States, November 2015. [ DOI : 10.1145/2807591.2807624 ]
https://hal.inria.fr/hal-01148202 -
31E. Kayaaslan, B. Uçar, C. Aykanat.
Semi-two-dimensional partitioning for parallel sparse matrix-vector multiplication, in: PCO2015 (IPDPSW), Hyderabad, India, IEEE CPS, May 2015, pp. 1125–1134.
https://hal.inria.fr/hal-01159692 -
32V. Paisante, M. Maalej, L. Barbosa, L. Gonnord, F. M. Q. Pereira.
Symbolic Range Analysis of Pointers, in: International Symposium of Code Generation and Optmization, Barcelon, Spain, March 2016, pp. 791-809.
https://hal.inria.fr/hal-01228928 -
33M. Rietmann, D. Peter, O. Schenk, B. Uçar, M. J. Grote.
Load-Balanced Local Time Stepping for Large-Scale Wave Propagation, in: 29th IEEE International Parallel & Distributed Processing Symposium, Hyderabad, India, IEEE CPS, May 2015, pp. 925–935.
https://hal.inria.fr/hal-01159687
Conferences without Proceedings
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34A. Benoit, A. Cavelan, Y. Robert, H. Sun.
Two-level checkpointing and partial verifications for linear task graphs, in: 6th International Workshop in Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems (PMBS15), Austin, TX, United States, November 2015.
https://hal.inria.fr/hal-01252400
Scientific Books (or Scientific Book chapters)
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35G. Aupy, A. Benoit, M. E. M. Diouri, O. Glück, L. Lefèvre.
Energy-aware checkpointing strategies, in: Fault-Tolerance Techniques for High-Performance Computing, T. Hérault, Y. Robert (editors), Springer, May 2015, pp. 279-317.
https://hal.inria.fr/hal-01205153 -
36H. Casanova, D. Zaidouni, F. Vivien.
Using replication for resilience on exascale systems, in: Fault-Tolerance Techniques for High-Performance Computing, T. Hérault, Y. Robert (editors), Springer, May 2015, 50 p.
https://hal.inria.fr/hal-01200486 -
37J. Dongarra, T. Hérault, Y. Robert.
Fault Tolerance Techniques for High-Performance Computing, in: Fault-Tolerance Techniques for High-Performance Computing, T. Hérault, Y. Robert (editors), Springer, May 2015, 83 p.
https://hal.inria.fr/hal-01200488 -
38T. Hérault, Y. Robert.
Fault-Tolerance Techniques for High-Performance Computing, Springer, May 2015, 320 p. [ DOI : 10.1007/978-3-319-20943-2 ]
https://hal.inria.fr/hal-01200479
Internal Reports
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39G. Aupy, A. Benoit, M. Fasi, Y. Robert, H. Sun, B. Uçar.
Coping with silent errors in HPC applications, CNRS, ENS Lyon & Inria, December 2015, no RR-8825.
https://hal.inria.fr/hal-01242369 -
40G. Aupy, J. Herrmann.
Periodicity is Optimal for Offline and Online Multi-Stage Adjoint Computations, Inria Grenoble - Rhône-Alpes, December 2015, no RR-8822.
https://hal.inria.fr/hal-01244584 -
41L. Bautista-Gomez, A. Benoit, A. Cavelan, S. K. Raina, Y. Robert, H. Sun.
Coping with Recall and Precision of Soft Error Detectors, ENS Lyon, CNRS & Inria, December 2015, no RR-8832, 30 p.
https://hal.inria.fr/hal-01246639 -
42L. Bautista-Gomez, A. Benoit, A. Cavelan, S. K. Raina, Y. Robert, H. Sun.
Which Verification for Soft Error Detection?, Inria Grenoble ; ENS Lyon ; Jaypee Institute of Information Technology, India ; Argonne National Laboratory ; University of Tennessee Knoxville, USA ; Inria, June 2015, no RR-8741, 20 p.
https://hal.inria.fr/hal-01164445 -
43A. Benoit, A. Cavelan, Y. Robert, H. Sun.
Optimal resilience patterns to cope with fail-stop and silent errors, LIP - ENS Lyon, October 2015, no RR-8786.
https://hal.inria.fr/hal-01215857 -
44A. Benoit, A. Cavelan, Y. Robert, H. Sun.
Two-level checkpointing and partial verifications for linear task graphs, ENS Lyon ; Inria Grenoble Rhône-Alpes, Université de Grenoble, October 2015, no RR-8794.
https://hal.inria.fr/hal-01216850 -
45A. Cavelan, S. K. Raina, Y. Robert, H. Sun.
Assessing the Impact of Partial Verifications Against Silent Data Corruptions, Inria Grenoble - Rhône-Alpes ; ENS Lyon ; Université Lyon 1 ; Jaypee Institute of Information Technology, India ; CNRS - Lyon (69) ; University of Tennessee Knoxville, USA ; Inria, April 2015, no RR-8711.
https://hal.inria.fr/hal-01143832 -
46A. Cavelan, Y. Robert, H. Sun, F. Vivien.
Voltage Overscaling Algorithms for Energy-Efficient Workflow Computations With Timing Errors, Inria, February 2015, no RR-8682.
https://hal.inria.fr/hal-01121065 -
47M. Fasi, J. Langou, Y. Robert, B. Uçar.
A Backward/Forward Recovery Approach for the Preconditioned Conjugate Gradient Algorithm, ENS Lyon, CNRS & Inria, December 2015, no RR-8826.
https://hal.inria.fr/hal-01242327 -
48M. Fasi, Y. Robert, B. Uçar.
Combining algorithm-based fault tolerance and checkpointing for iterative solvers, Inria Grenoble - Rhône-Alpes ; Inria, January 2015, no RR-8675.
https://hal.inria.fr/hal-01111707 -
49G. Iooss, S. Rajopadhye, C. Alias, Y. Zou.
Mono-parametric Tiling is a Polyhedral Transformation, Inria Grenoble - Rhône-Alpes ; CNRS, October 2015, no RR-8802, 40 p.
https://hal.inria.fr/hal-01219452 -
50H. Kabir, J. Booth, G. Aupy, A. Benoit, Y. Robert, P. Raghavan.
STS-k: A Multilevel Sparse Triangular Solution Scheme for NUMA Multicores, Penn State University ; ENS Lyon ; Inria, August 2015, no RR-8763.
https://hal.inria.fr/hal-01183904 -
51O. Kaya, B. Uçar.
High-performance parallel algorithms for the Tucker decomposition of higher order sparse tensors, Inria - Research Centre Grenoble – Rhône-Alpes, October 2015, no RR-8801.
https://hal.inria.fr/hal-01219316 -
52M. Maalej, L. Gonnord.
Do we still need new Alias Analyses?, Université Lyon Claude Bernard / Laboratoire d'Informatique du Parallélisme, November 2015, no RR-8812.
https://hal.inria.fr/hal-01228581
Other Publications
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53D. Monniaux, L. Gonnord.
An encoding of array verification problems into array-free Horn clauses, July 2015, working paper or preprint.
https://hal.archives-ouvertes.fr/hal-01206882
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54Blue Waters Newsletter, dec 2012.
http://cgi.ncsa.illinois.edu/BlueWaters/pdfs/bw-newsletter-1212.pdf -
55Blue Waters Resources, 2013.
https://bluewaters.ncsa.illinois.edu/data -
56The BOINC project, 2013.
http://boinc.berkeley.edu/ -
57Final report of the Department of Energy Fault Management Workshop, December 2012.
http://science.energy.gov/~/media/ascr/pdf/program-documents/docs/FaultManagement-wrkshpRpt-v4-final.pdf -
58System Resilience at Extreme Scale: white paper, 2008, DARPA.
http://institute.lanl.gov/resilience/docs/IBM%20Mootaz%20White%20Paper%20System%20Resilience.pdf -
59Top500 List - November, 2011.
http://www.top500.org/list/2011/11/ -
60Top500 List - November, 2012.
http://www.top500.org/list/2012/11/ -
61The Green500 List - November, 2015.
http://www.green500.org/lists/green201511 -
62E. Agullo, A. Buttari, A. Guermouche, F. Lopez.
Multifrontal QR Factorization for Multicore Architectures over Runtime Systems, in: Euro-Par 2013 Parallel Processing, F. Wolf, B. Mohr, D. Mey (editors), Lecture Notes in Computer Science, Springer Berlin Heidelberg, 2013, vol. 8097, pp. 521–532. -
63C. Alias, A. Plesco.
Data-aware Process Networks, Inria - Research Centre Grenoble – Rhône-Alpes, June 2015, no RR-8735, 32 p.
https://hal.inria.fr/hal-01158726 -
64I. Assayad, A. Girault, H. Kalla.
Tradeoff exploration between reliability power consumption and execution time, in: Proceedings of SAFECOMP, the Conf. on Computer Safety, Reliability and Security, Washington, DC, USA, 2011. -
65C. Augonnet, S. Thibault, R. Namyst, P.-A. Wacrenier.
StarPU: A unified platform for task scheduling on heterogeneous multicore architectures, in: Concurrency and Computation: Practice and Experience, Special Issue: Euro-Par 2009, February 2011, vol. 23, no 2, pp. 187–198. [ DOI : 10.1002/cpe.1631 ]
http://hal.inria.fr/inria-00550877 -
66H. Aydin, Q. Yang.
Energy-aware partitioning for multiprocessor real-time systems, in: IPDPS'03, the IEEE Int. Parallel and Distributed Processing Symposium, 2003, pp. 113–121. -
67N. Bansal, T. Kimbrel, K. Pruhs.
Speed Scaling to Manage Energy and Temperature, in: Journal of the ACM, 2007, vol. 54, no 1, pp. 1 – 39.
http://doi.acm.org/10.1145/1206035.1206038 -
68A. Benoit, L. Marchal, J.-F. Pineau, Y. Robert, F. Vivien.
Scheduling concurrent bag-of-tasks applications on heterogeneous platforms, in: IEEE Transactions on Computers, 2010, vol. 59, no 2, pp. 202-217. -
69S. Blackford, J. Choi, A. Cleary, E. D'Azevedo, J. Demmel, I. Dhillon, J. Dongarra, S. Hammarling, G. Henry, A. Petitet, K. Stanley, D. Walker, R. C. Whaley.
ScaLAPACK Users' Guide, SIAM, 1997. -
70S. Blackford, J. Dongarra.
Installation Guide for LAPACK, LAPACK Working Note, June 1999, no 41, originally released March 1992. -
71A. Buttari, J. Langou, J. Kurzak, J. Dongarra.
Parallel tiled QR factorization for multicore architectures, in: Concurrency: Practice and Experience, 2008, vol. 20, no 13, pp. 1573-1590. -
72J.-J. Chen, T.-W. Kuo.
Multiprocessor energy-efficient scheduling for real-time tasks, in: ICPP'05, the Int. Conference on Parallel Processing, 2005, pp. 13–20. -
73S. Donfack, L. Grigori, W. Gropp, L. V. Kale.
Hybrid Static/dynamic Scheduling for Already Optimized Dense Matrix Factorization, in: Parallel Distributed Processing Symposium (IPDPS), 2012 IEEE 26th International, 2012, pp. 496-507.
http://dx.doi.org/10.1109/IPDPS.2012.53 -
74J. Dongarra, J.-F. Pineau, Y. Robert, Z. Shi, F. Vivien.
Revisiting Matrix Product on Master-Worker Platforms, in: International Journal of Foundations of Computer Science, 2008, vol. 19, no 6, pp. 1317-1336. -
75J. Dongarra, J.-F. Pineau, Y. Robert, F. Vivien.
Matrix Product on Heterogeneous Master-Worker Platforms, in: 13th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, Salt Lake City, Utah, February 2008, pp. 53–62. -
76I. S. Duff, J. K. Reid.
The multifrontal solution of indefinite sparse symmetric linear systems, in: "ACM Transactions on Mathematical Software", 1983, vol. 9, pp. 302-325. -
77I. S. Duff, J. K. Reid.
The multifrontal solution of unsymmetric sets of linear systems, in: SIAM Journal on Scientific and Statistical Computing, 1984, vol. 5, pp. 633-641. -
78P. Feautrier, C. Lengauer.
The Polyhedron Model, in: Encyclopedia of Parallel Programming, 2011. -
79L. Grigori, J. W. Demmel, H. Xiang.
Communication avoiding Gaussian elimination, in: Proceedings of the 2008 ACM/IEEE conference on Supercomputing, Piscataway, NJ, USA, SC '08, IEEE Press, 2008, 29:1 p.
http://dl.acm.org/citation.cfm?id=1413370.1413400 -
80B. Hadri, H. Ltaief, E. Agullo, J. Dongarra.
Tile QR Factorization with Parallel Panel Processing for Multicore Architectures, in: IPDPS'10, the 24st IEEE Int. Parallel and Distributed Processing Symposium, 2010. -
81J. W. H. Liu.
The multifrontal method for sparse matrix solution: Theory and Practice, in: SIAM Review, 1992, vol. 34, pp. 82–109. -
82R. Melhem, D. Mossé, E. Elnozahy.
The Interplay of Power Management and Fault Recovery in Real-Time Systems, in: IEEE Transactions on Computers, 2004, vol. 53, no 2, pp. 217-231. -
83A. J. Oliner, R. K. Sahoo, J. E. Moreira, M. Gupta, A. Sivasubramaniam.
Fault-aware job scheduling for bluegene/l systems, in: IPDPS'04, the IEEE Int. Parallel and Distributed Processing Symposium, 2004, pp. 64–73. -
84G. N. S. Prasanna, B. R. Musicus.
Generalized Multiprocessor Scheduling and Applications to Matrix Computations, in: IEEE Trans. Parallel Distrib. Syst., 1996, vol. 7, no 6, pp. 650-664. -
85G. N. S. Prasanna, B. R. Musicus.
The Optimal Control Approach to Generalized Multiprocessor Scheduling, in: Algorithmica, 1996, vol. 15, no 1, pp. 17-49. -
86G. Quintana-Ortí, E. Quintana-Ortí, R. A. van de Geijn, F. G. V. Zee, E. Chan.
Programming Matrix Algorithms-by-Blocks for Thread-Level Parallelism, in: ACM Transactions on Mathematical Software, 2009, vol. 36, no 3. -
87Y. Robert, F. Vivien.
Algorithmic Issues in Grid Computing, in: Algorithms and Theory of Computation Handbook, Chapman and Hall/CRC Press, 2009. -
88G. Zheng, X. Ni, L. V. Kale.
A scalable double in-memory checkpoint and restart scheme towards exascale, in: Dependable Systems and Networks Workshops (DSN-W), 2012.
http://dx.doi.org/10.1109/DSNW.2012.6264677 -
89D. Zhu, R. Melhem, D. Mossé.
The effects of energy management on reliability in real-time embedded systems, in: Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design (ICCAD), 2004, pp. 35–40.