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Bibliography

Major publications by the team in recent years
  • 1L. Besnard, T. Gautier, P. Le Guernic, J.-P. Talpin.

    Compilation of Polychronous Data Flow Equations, in: Synthesis of Embedded Software, S. K. Shukla, J.-P. Talpin (editors), Springer, 2010, pp. 1-40. [ DOI : 10.1007/978-1-4419-6400-7_1 ]

    http://hal.inria.fr/inria-00540493
  • 2A. Bouakaz, J.-P. Talpin.

    Design of Safety-Critical Java Level 1 Applications Using Affine Abstract Clocks, in: International Workshop on Software and Compilers for Embedded Systems, St. Goar, Germany, June 2013, pp. 58-67. [ DOI : 10.1145/2463596.2463600 ]

    https://hal.inria.fr/hal-00916487
  • 3C. Brunette, J.-P. Talpin, A. Gamatié, T. Gautier.

    A metamodel for the design of polychronous systems, in: The Journal of Logic and Algebraic Programming, 2009, vol. 78, no 4, pp. 233 - 259, IFIP WG1.8 Workshop on Applying Concurrency Research in Industry. [ DOI : 10.1016/j.jlap.2008.11.005 ]

    http://www.sciencedirect.com/science/article/pii/S1567832608000957
  • 4A. Gamatié, T. Gautier, P. Le Guernic, J.-P. Talpin.

    Polychronous Design of Embedded Real-Time Applications, in: ACM Transactions on Software Engineering and Methodology (TOSEM), April 2007, vol. 16, no 2.

    http://doi.acm.org/10.1145/1217295.1217298
  • 5A. Gamatié, T. Gautier.

    The Signal Synchronous Multiclock Approach to the Design of Distributed Embedded Systems, in: IEEE Transactions on Parallel and Distributed Systems, 2010, vol. 21, no 5, pp. 641-657. [ DOI : 10.1109/TPDS.2009.125 ]

    http://hal.inria.fr/inria-00522794
  • 6A. Gamatié, T. Gautier, P. Le Guernic.

    Synchronous design of avionic applications based on model refinements, in: Journal of Embedded Computing (IOS Press), 2006, vol. 2, no 3-4, pp. 273-289.

    http://hal.archives-ouvertes.fr/hal-00541523
  • 7P. Le Guernic, J.-P. Talpin, J.-C. Le Lann.

    Polychrony for system design, in: Journal of Circuits, Systems and Computers, Special Issue on Application Specific Hardware Design, June 2003, vol. 12, no 03.

    http://hal.inria.fr/docs/00/07/18/71/PDF/RR-4715.pdf
  • 8D. Potop-Butucaru, Y. Sorel, R. de Simone, J.-P. Talpin.

    From Concurrent Multi-clock Programs to Deterministic Asynchronous Implementations, in: Fundamenta Informaticae, January 2011, vol. 108, no 1-2, pp. 91–118.

    http://dl.acm.org/citation.cfm?id=2362088.2362094
  • 9J.-P. Talpin, J. Ouy, T. Gautier, L. Besnard, P. Le Guernic.

    Compositional design of isochronous systems, in: Science of Computer Programming, February 2012, vol. 77, no 2, pp. 113-128. [ DOI : 10.1016/j.scico.2010.06.006 ]

    http://hal.archives-ouvertes.fr/hal-00768341
Publications of the year

Articles in International Peer-Reviewed Journals

  • 10V. Joloboff, S. WANG, Y. DENG.

    Fast approximately timed simulation, in: WIT Transactions on Information and Communication Technologies, March 2015, vol. 978-1-78466-054-3, no 68, 756 p.

    https://hal.archives-ouvertes.fr/hal-01081104

International Conferences with Proceedings

  • 11V. Joloboff, J.-F. Monin, X. Shi.

    Towards Verified Faithful Simulation, in: Dependable Software Engineering: Theories, Tools, and Applications, Nanjing, China, S. Verlag (editor), November 2015.

    https://hal.inria.fr/hal-01242963
  • 12C. Junke, T. Gautier, L. Besnard, J.-P. Talpin.

    Integration of polychrony in the QGen model compiler, in: ERTS'16 - European Congress on Embeddd Real-Rime Software and Systems, Toulouse, France, January 2016.

    https://hal.inria.fr/hal-01241808
  • 14V. C. Ngo, J.-P. Talpin, T. Gautier, L. Besnard, P. Le Guernic.

    Modular translation validation of a full-sized synchronous compiler using off-the-shelf verification tools (abstract), in: International Workshop on Software and Compilers for Embedded Systems, St Goar, Germany, ACM, June 2015.

    https://hal.inria.fr/hal-01148919
  • 15V. C. Ngo, J.-P. Talpin, T. Gautier, P. Le Guernic.

    Translation Validation for Clock Transformations in a Synchronous Compiler, in: FASE - ETAPS 2015, London, United Kingdom, Springer, April 2015.

    https://hal.inria.fr/hal-01087795
  • 16V. C. Ngo, J.-P. Talpin, T. Gautier.

    Translation Validation for Synchronous Data-flow Specification in the SIGNAL Compiler, in: International Conference on Formal Techniques for Distributed Objects, Components and Systems, Grenoble, France, Formal Techniques for Distributed Objects, Components, and Systems, Springer, June 2015, vol. 9039, pp. 66-80. [ DOI : 10.1007/978-3-319-19195-9_5 ]

    https://hal.inria.fr/hal-01148901
  • 17J. Prashi, S. Kumar Shukla, J.-P. Talpin, H. Yu.

    Mapping Functional Behavior onto Architectural Model in a Model Driven Embedded System Design, in: Symposium On Applied Computing, Salamanca, Spain, April 2015.

    https://hal.inria.fr/hal-01148908
  • 18J.-P. Talpin, P. Jouvelot, S. Kumar Shukla.

    Towards refinement types for time-dependent data-flow networks, in: ACM-IEEE Conference on Methods and Models for System Design, Austin, United States, I. C. Society (editor), September 2015.

    https://hal.inria.fr/hal-01241806
  • 19H. Yu, J. Prashi, J.-P. Talpin, S. K. Shukla, S. Shiraishi.

    Model-Based Integration for Automotive Control Software, in: Digital Automation Conference, San Francisco, United States, ACM, June 2015.

    https://hal.inria.fr/hal-01148905

Internal Reports

  • 20J.-P. Talpin, P. Jouvelot, S. Kumar Shukla.

    Liquid Clocks - Refinement Types for Time-Dependent Stream Functions, Inria Rennes - Bretagne Atlantique ; Inria, June 2015, no RR-8747.

    https://hal.inria.fr/hal-01166350


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