Section: Partnerships and Cooperations
International Initiatives
International Project Grants
US Air Force Office for Scientific Research – Grant FA8655-13-1-3049
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Title: Co-Modeling of Safety-Critical Multi-threaded Embedded Software for Multi-Core Embedded Platforms
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International Partner (Institution - Laboratory - Researcher):
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See also: http://www.irisa.fr/espresso/Polycore
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Abstract: The aim of the USAF OSR Grant FA8655-13-1-3049 is to support collaborative research entitled “Co-Modeling of safety-critical multi-threaded embedded software for multi-core embedded platforms” between Inria project-team ESPRESSO, the VTRL Fermat Laboratory and the TUKL embedded system research group, under the program of the Polycore associate-project.
Applied Science & Technology Research Institute (ASTRI, Hong Kong)
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Title: Virtual Prototyping of Embedded Software Architectures
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Abstract: the topics of our present collaboration is essentially on heterogeneous time modelling for virtual prototyping in cyber-physical systems. Our project covers a wide spectrum of area of experience developed since 2012 and comprising
Inria International Labs
SACCADES
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The SACCADES project is a LIAMA project hosted by East China Normal University and jointly led by Vania Joloboff (Inria) and Min Zhang (ECNU). The SACCADES project aims at improving the development of reliable cyber physical systems and more generally of distributed systems combining asynchronous with synchronous aspects, with different but complementary angles:
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develop the theoretical support for Models of Computations and Communications (MoCCs) that are the fundamentals basis of the tools.
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develop software tools (a) to enable the development and verification of executable models of the application software, which may be local or distributed and (b) to define and optimize the mapping of software components over the available resources.
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develop virtual prototyping technology enabling the validation of the application software on the target hardware platform.
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Inria International Partners
POLYCORE
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Team TEA collaborates with Sandeep Shukla (now with IIT Kanpur) and his team at Virginia Tech, since 2002 (NSF-Inria BALBOA and Polycore projects, USAF OSR grant).
To date, our fruitful and sustained collaboration has yield the creation of the ACM-IEEE MEMOCODE conference series (ACM-IEEE MEMOCODE conference series) in 2003, of the ACM-SIGDA FMGALS workshop series, and of a full-day tutorial at ACM-IEEE DATE'09 on formal methods in system design. We have jointly edited two books with Springer (Formal methods and models for system design, R. Gupta, S. Shukla, J.-P. Talpin, Eds. ISBN 1-4020-8051-4. Springer, 2004.) (Synthesis of embedded systems. S. Shukla, J.-P. Talpin, Eds. ISBN 978-1-4419-6399-4. Springer, 2010), two special issues of the IEEE Transactions on Computers and one of the IEEE Transactions on Industrial Informatics, and published more than 40 joint journal articles and conference papers.
This year, we published a joint paper at the 52nd. Digital Automation Conference in San Francisco [19] .
VESA
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Title: Virtual Prototyping of embedded software architectures
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We collaborate with John Koo, now with ASTRI, and LIAMA since 2012 through visiting grants of the Chinese Academy of Science and of the University of Rennes on the topics of heterogeneous time modelling and virtual prototyping in cyber-physical systems.
TIX
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The first topic of our collaboration is the formal definition of cross-domains clock models in system design and the formal verification of time stabilisation and synchronisation protocols used in distributed systems (sensor networks, data-bases). In this prospect, the NSF project Roseline is our basis of investigation (https://sites.google.com/site/roselineproject ). Roseline aims at enabling robust, secure and efficient knowledge of time across the system stack.
Our second topic of collaboration is the refoundation of time modelling in high-level reactive and scripting languages, for application to the above using uni-kernels to cut through system stacks. We aim at applying the concepts of refinement types to formally specify and infer timing properties in CPS models from different system design view-point (physical, hardware, software) and using different levels of abstraction into multi-sorted 1st order logic (delta-decidability, linear arithmetic, Boolean logic, temporal logic).