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Section: New Software and Platforms

PEGASE

Keyword: Sensors - SHM (Structural Health Monitoring)

Scientific Description

PEGASE (Plate-forme Experte Générique pour Applications Sans-fil Embarquées) is a generic and high level wireless sensor platform. Currently, the setup of the new PEGASE 2 platform is finalized as the technological successor of the previous PEGASE platform developed by IFSTTAR. This PEGASE 1 platform is licensed and disseminated by the third party company A3IP since 2008 and has been sold in thousands of units.

Based on various feedback from monitoring applications of PEGASE, and due to the fast obsolescence of electronic devices, the design of the new PEGASE 2 platform has been launched in 2013. Some of the main functions of PEGASE are reinforced:

  • Software genericity: use of a Linux embedded OS to make application development independent from the hardware, and to enable the user to manage the system without any physical and heavy operations.

  • Hardware genericity: with a principle of daughter and mother boards, each redundant need is embedded (processing, memory, timing, GPS, energy, etc) where each pluggable daughter board implements a specific function (sensing, 3G, Ethernet, communication, signal processing and relay control).

  • Accurate time synchronization principle: based on an original GPS and PPS algorithm, PEGASE platform is one of the only boards able to time-stamp data from sensors or any event with high accuracy and in a deterministic way.

On PEGASE 2 platform, previous principles are maintained or extended. A full electronic design from scratch has been decided by the team in 2014 to maximize its capacities in terms efficiency, cost, energy consumption, etc. The main new characteristics of PEGASE 2 are:

  • A “real” Linux kernel is now flashed inside the board based on a professional Debian 4.0 (or higher version) of Linux. This Linux branch is the only one validated by IEEE to suit embedded applications

  • Previous SDK in C language has been ported and improved in C++ with a generalization of the signal/slot principle to offer end-users a full programing context based on “event driven developments”.

  • Extended hardware capacities: GigaBytes of memory, multiple USB port, etc...

  • PEGASE 2 board implements new hardware such as a on-board Battery Management System (BMS) to be able to manage an energy efficiency based on a battery and a solar cell; PEGASE 2 mother board integrates a MEMS Mpu9150 from Invenses company wich is a MEMS that provides Acceleration, Temperature and Gyroscope in 3D,...

In 2015 and 2016 various functional daughter boards have been designed to complete the PEGASE 2 panoply:

  • 8 analog and 8 digital daughter boards

  • LORA protocol Daughter Board

  • 3G Daughter Board

Figure 6. PEGASE and PEGASE daughter board
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In 2016, based on an industrial contract with the company SDEL-CC (subsidiary company of Vinci group) an important algorithm has been implemented in PEGASE 2 board to make it able to time stamp any physical event up to 10 nanoseconds (independently from the wireless protocol or the distances between the platform that could be some tens of kilometers). This time stamping ability is unique and makes PEGASE 2 the only wireless device in the world with such a time accuracy in a deterministic way and in universal time (based on its GSP/PPS principle).

The most significant development in the PEGASE 2 context is the development of a Generic Cloud Server Application:

  • manage multiple instrumentation projects

  • various sensors (based on PEGASE 1 or 2 or others) can be set up

  • collect big data based on Mongo DB database

  • visualize the graphs of data from sensors in f(t) on dynamic charts

  • export data to files, through specific API, or to third-party software (Matlab, QT C++...)

In the last two years the Generic Supervisor became a professional software product that is transfered under industrial Licensing, e.g. to the companies Power Lan and Stimio. By the end of 2016, at least these 2 companies will be officially licensed by IFSTTAR to disseminate the Supervisor.

Figure 7. Supervisor
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