CASH - 2018
Overall Objectives
New Software and Platforms
Partnerships and Cooperations
Overall Objectives
New Software and Platforms
Partnerships and Cooperations


Publications of the year

International Conferences with Proceedings

  • 1C. Alias.

    Improving Communication Patterns in Polyhedral Process Networks, in: HIP3ES 2018 - Sixth International Workshop on High Performance Energy Efficient Embedded Systems, Manchester, United Kingdom, January 2018, pp. 1-6.

  • 2T. Delizy, S. Gros, K. Marquet, M. Moy, T. Risset, G. Salagnac.

    Estimating the Impact of Architectural and Software Design Choices on Dynamic Allocation of Heterogeneous Memories, in: RSP 2018 - 29th International Symposium on Rapid System Prototyping, Turin, Italy, October 2018, pp. 1-7.

  • 3R. Fontaine, L. Gonnord, L. Morel.

    Polyhedral Dataflow Programming: a Case Study, in: SBAC-PAD 2018 - 30th International Symposium on Computer Architecture and High-Performance Computing, Lyon, France, IEEE, September 2018, pp. 1-9.

  • 4L. Gonnord, S. Mosser.

    Du code aux modèles, des modèles au code: enseigner les langages dédiés (DSL), in: CIEL 2018 : 7ème Conférence en IngénieriE du Logiciel, Grenoble, France, June 2018, pp. 1-4.

  • 5L. Gonnord, S. Mosser.

    Practicing Domain-Specific Languages: From Code to Models, in: 14th Educators Symposium at MODELS 2018, Copenaghen, Denmark, October 2018, pp. 1-8. [ DOI : 10.1145/3270112.3270116 ]

  • 6A. Graillat, M. Moy, P. Raymond, B. Dupont De Dinechin.

    Parallel Code Generation of Synchronous Programs for a Many-core Architecture, in: DATE 2018 - Design, Automation and Test in Europe, Dresden, Germany, IEEE, March 2018, pp. 1139-1142. [ DOI : 10.23919/DATE.2018.8342182 ]


Conferences without Proceedings

  • 7C. Ballabriga, J. Forget, L. Gonnord, G. Lipari, J. Ruiz.

    Static Analysis Of Binary Code With Memory Indirections Using Polyhedra, in: International Conference on Verification, Model Checking, and Abstract Interpretation (VMCAI'19), Lisbon, Portugal, January 2019.

  • 8T. Delizy, S. Gros, K. Marquet, M. Moy, T. Risset, G. Salagnac.

    Quels objets en NVRAM ? Placement en mémoires de travail hétérogènes, in: Compas 2018 - Conférence d’informatique en Parallélisme, Architecture et Système, Toulouse, France, July 2018, pp. 1-8.


Internal Reports

References in notes
  • 13IEEE 1666 Standard: SystemC Language Reference Manual, Open SystemC Initiative, 2011.

  • 14OSCI TLM-2.0 Language Reference Manual, Open SystemC Initiative (OSCI), June 2008.

  • 15C. Alias, A. Darte, P. Feautrier, L. Gonnord.

    Multi-dimensional Rankings, Program Termination, and Complexity Bounds of Flowchart Programs, in: International Static Analysis Symposium (SAS'10), 2010.
  • 16C. Alias, A. Plesco.

    Method of Automatic Synthesis of Circuits, Device and Computer Program associated therewith, April 2014, Patent FR1453308.
  • 17C. Alias, A. Plesco.

    Data-aware Process Networks, Inria - Research Centre Grenoble – Rhône-Alpes, June 2015, no RR-8735, 32 p.

  • 18C. Alias, A. Plesco.

    Optimizing Affine Control with Semantic Factorizations, in: ACM Transactions on Architecture and Code Optimization (TACO) , December 2017, vol. 14, no 4, 27 p.
  • 19I. Amer, C. Lucarz, G. Roquier, M. Mattavelli, M. Raulet, J.-F. Nezan, O. Deforges.

    Reconfigurable video coding on multicore, in: Signal Processing Magazine, IEEE, 2009, vol. 26, no 6, pp. 113–123.

  • 20S. Ananian.

    The Static Single Information Form, MIT, September 1999.
  • 21C. B. Aoun, L. Andrade, T. Maehne, F. Pêcheux, M.-M. Louërat, A. Vachouxy.

    Pre-simulation elaboration of heterogeneous systems: The SystemC multi-disciplinary virtual prototyping approach, in: Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2015 International Conference on, IEEE, 2015, pp. 278–285.
  • 22P. Aubry, P.-E. Beaucamps, F. Blanc, B. Bodin, S. Carpov, L. Cudennec, V. David, P. Doré, P. Dubrulle, B. Dupont De Dinechin, F. Galea, T. Goubier, M. Harrand, S. Jones, J.-D. Lesage, S. Louise, N. Morey Chaisemartin, T. H. Nguyen, X. Raynaud, R. Sirdey.

    Extended Cyclostatic Dataflow Program Compilation and Execution for an Integrated Manycore Processor, in: Alchemy 2013 - Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems, Barcelona, Spain, Proceedings of the International Conference on Computational Science, ICCS 2013, June 2013, vol. 18, pp. 1624-1633. [ DOI : 10.1016/j.procs.2013.05.330 ]

  • 23D. Becker, M. Moy, J. Cornet.

    Parallel Simulation of Loosely Timed SystemC/TLM Programs: Challenges Raised by an Industrial Case Study, in: MDPI Electronics, 2016, vol. 5, no 2, 22 p. [ DOI : 10.3390/electronics5020022 ]

  • 24D. Caromel, L. Henrio.

    A Theory of Distributed Objects, Springer-Verlag, 2004.
  • 25P. Cousot, R. Cousot.

    Abstract interpretation: A unified lattice model for static analysis of programs by construction or approximation of fixpoints, in: 4th ACM Symposium on Principles of Programming Languages (POPL'77), Los Angeles, January 1977, pp. 238-252.
  • 26F. De Boer, V. Serbanescu, R. Hähnle, L. Henrio, J. Rochas, C. C. Din, E. Broch Johnsen, M. Sirjani, E. Khamespanah, K. Fernandez-Reyes, A. M. Yang.

    A Survey of Active Object Languages, in: ACM Comput. Surv., October 2017, vol. 50, no 5, pp. 76:1–76:39.

  • 27M. Duranton, D. Black-Schaffer, K. D. Bosschere, J. Maebe.

    The HIPEAC VISION FOR ADVANCED COMPUTING IN HORIZON 2020, https://www.hipeac.net/v13, 2013.

  • 28P. Feautrier.

    Scalable and Structured Scheduling, in: International Journal of Parallel Programming, October 2006, vol. 34, no 5, pp. 459–487.
  • 29P. Feautrier.

    Dataflow analysis of array and scalar references, in: International Journal of Parallel Programming, 1991, vol. 20, no 1, pp. 23–53.
  • 30P. Feautrier, A. Gamatié, L. Gonnord.

    Enhancing the Compilation of Synchronous Dataflow Programs with a Combined Numerical-Boolean Abstraction, in: CSI Journal of Computing, 2012, vol. 1, no 4, pp. 8:86–8:99.

  • 31K. Fernandez-Reyes, D. Clarke, E. Castegren, H.-P. Vo.

    Forward to a Promising Future, in: Conference proceedings COORDINATION 2018, 2018.
  • 32R. Fontaine, L. Gonnord, L. Morel.

    Polyhedral Dataflow Programming: a Case Study, in: SBAC-PAD 2018 - 30th International Symposium on Computer Architecture and High-Performance Computing, Lyon, France, IEEE, September 2018, pp. 1-9.

  • 33R. Fontaine, L. Gonnord, L. Morel.

    Polyhedral Dataflow Programming: a Case Study, in: International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), IEEE, September 2018.
  • 34L. Gonnord, P. Iannetta, L. Morel.

    Semantic Polyhedral Model for Arrays and Lists, Inria Grenoble Rhône-Alpes ; UCBL ; LIP - ENS Lyon ; CEA List, June 2018, no RR-9183.

  • 35M. I. Gordon.

    Compiler techniques for scalable performance of stream programs on multicore architectures, Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science, 2010.
  • 36O. Hakjoo, L. Wonchan, H. Kihong, Y. Hongseok, Y. Kwangkeun.

    Selective context-sensitivity guided by impact pre-analysis, in: ACM SIGPLAN Conference on Programming Language Design and Implementation, PLDI '14, Edinburgh, United Kingdom - June 09 - 11, 2014, ACM, 2014, 49 p.
  • 37N. Halbwachs, P. Caspi, P. Raymond, D. Pilaud.

    The synchronous data flow programming language LUSTRE, in: Proceedings of the IEEE, Sep 1991, vol. 79, no 9, pp. 1305-1320.
  • 38L. Henrio.

    Data-flow Explicit Futures, I3S, Université Côte d'Azur, April 2018.

  • 39G. Kahn.

    The semantics of a simple language for parallel programming, in: Information processing, North-Holland, 1974.
  • 40A. Krizhevsky, I. Sutskever, G. E. Hinton.

    Imagenet classification with deep convolutional neural networks, in: Advances in neural information processing systems, 2012, pp. 1097–1105.
  • 41M. Maalej Kammoun.

    Low-cost memory analyses for efficient compilers, Université Lyon 1, 2017, Thèse de doctorat, Université Lyon1.

  • 42M. Maalej Kammoun, V. Paisante, P. Ramos, L. Gonnord, F. Pereira.

    Pointer Disambiguation via Strict Inequalities, in: Code Generation and Optimisation, Austin, United States, February 2017.

  • 43M. Moy.

    Parallel Programming with SystemC for Loosely Timed Models: A Non-Intrusive Approach, in: DATE, Grenoble, France, March 2013, 9 p.

  • 44V. Paisante, M. Maalej Kammoun, L. Barbosa, L. Gonnord, F. M. Q. Pereira.

    Symbolic Range Analysis of Pointers, in: International Symposium of Code Generation and Optmization, Barcelon, Spain, March 2016, pp. 791-809.

  • 45A. Plesco.

    Program Transformations and Memory Architecture Optimizations for High-Level Synthesis of Hardware Accelerators, Ecole normale supérieure de lyon - ENS LYON, September 2010.

  • 46L.-N. Pouchet.

    Polybench: The polyhedral benchmark suite, 2012.

  • 47W. H. Press, S. A. Teukolsky, W. T. Vetterling, B. P. Flannery.

    Numerical recipes in C++, in: The art of scientific computing, 2015.
  • 48P. Quinton.

    Automatic synthesis of systolic arrays from uniform recurrent equations, in: ACM SIGARCH Computer Architecture News, 1984, vol. 12, no 3, pp. 208–214.
  • 49H. Rihani, M. Moy, C. Maiza, R. I. Davis, S. Altmeyer.

    Response Time Analysis of Synchronous Data Flow Programs on a Many-Core Processor, in: Proceedings of the 24th International Conference on Real-Time Networks and Systems, New York, NY, USA, RTNS '16, ACM, 2016, pp. 67–76.

  • 50H. N. W. Santos, I. Maffra, L. Oliveira, F. Pereira, L. Gonnord.

    Validation of Memory Accesses Through Symbolic Analyses, in: Proceedings of the 2014 ACM International Conference on Object Oriented Programming Systems Languages And Applications (OOPSLA'14), Portland, Oregon, United States, October 2014.

  • 51W. Thies.

    Language and compiler support for stream programs, Massachusetts Institute of Technology, 2009.
  • 52J. Travis, J. Kring.

    LabVIEW for everyone: graphical programming made easy and fun, Prentice-Hall, 2007.
  • 53A. Turjan.

    Compiling Nested Loop Programs to Process Networks, Universiteit Leiden, 2007.
  • 54N. Ventroux, T. Sassolas.

    A new parallel SystemC kernel leveraging manycore architectures, in: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2016, IEEE, 2016, pp. 487–492.
  • 55S. Verdoolaege.

    Polyhedral Process Networks, Handbook of Signal Processing Systems, Springer, 2010, pp. 931–965.
  • 56S. Williams, A. Waterman, D. Patterson.

    Roofline: an insightful visual performance model for multicore architectures, in: Communications of the ACM, 2009, vol. 52, no 4, pp. 65–76.
  • 57P. Wilmott.

    Quantitative Finance, Wiley, 2006.
  • 58B. da Silva, A. Braeken, E. H. D'Hollander, A. Touhafi.

    Performance modeling for FPGAs: extending the roofline model with high-level synthesis tools, in: International Journal of Reconfigurable Computing, 2013, vol. 2013, 7 p.