Section: Partnerships and Cooperations

European Initiatives

H2020 ARGO

Participants : Steven Derrien, Angeliki Kritikakou, Olivier Sentieys.

  • Program: H2020-ICT-04-2015

  • Project acronym: ARGO

  • Project title: WCET-Aware Parallelization of Model-Based Applications for Heterogeneous Parallel Systems

  • Duration: Feb. 2016 - Feb. 2019

  • Coordinator: KIT

  • Other partners: KIT (Germany), UR1/Inria/CAIRN, Recore Systems (Netherlands), TEI-WG (Greece), Scilab Ent. (France), Absint (Ger.), DLR (Ger.), Fraunhofer (Ger.)

Increasing performance and reducing cost, while maintaining safety levels and programmability are the key demands for embedded and cyber-physical systems, e.g. aerospace, automation, and automotive. For many applications, the necessary performance with low energy consumption can only be provided by customized computing platforms based on heterogeneous many-core architectures. However, their parallel programming with time-critical embedded applications suffers from a complex toolchain and programming process. ARGO will address this challenge with a holistic approach for programming heterogeneous multi- and many-core architectures using automatic parallelization of model-based real-time applications. ARGO will enhance WCET-aware automatic parallelization by a cross-layer programming approach combining automatic tool-based and user-guided parallelization to reduce the need for expertise in programming parallel heterogeneous architectures. The ARGO approach will be assessed and demonstrated by prototyping comprehensive time-critical applications from both aerospace and industrial automation domains on customized heterogeneous many-core platforms.

ANR International ARTEFaCT

Participants : Olivier Sentieys, Van-Phu Ha, Tomofumi Yuki.

  • Program: ANR International France-Switzerland

  • Project acronym: ARTEFaCT

  • Project title: AppRoximaTivE Flexible Circuits and Computing for IoT

  • Duration: Feb. 2016 - Dec. 2019

  • Coordinator: CEA

  • Other partners: CEA-LETI, CAIRN, EPFL

The ARTEFaCT project aims to build on the preliminary results on inexact and exact near-threshold and sub-threshold circuit design to achieve major energy consumption reductions by enabling adaptive accuracy control of applications. ARTEFaCT proposes to address, in a consistent fashion, the entire design stack, from physical hardware design, up to software application analysis, compiler optimizations, and dynamic energy management. We do believe that combining sub-near-threshold with inexact circuits on the hardware side and, in addition, extending this with intelligent and adaptive power management on the software side will produce outstanding results in terms of energy reduction, i.e., at least one order of magnitude, in IoT applications. The project will contribute along three research directions: (1) approximate, ultra low-power circuit design, (2) modeling and analysis of variable levels of computation precision in applications, and (3) accuracy-energy trade- offs in software.