Section: Application Domains
Application Domains
The goal of the PARKAS project is the design, semantics and compilation of languages for the implementation of provably safe and efficient computing systems. We are driven by the ideal of a unique source code used both to program and simulate a wide variety of systems, including (1) embedded real-time controllers (e.g., fly-by-wire, engine control); (2) computationally intensive applications (signal processing, numerical, non-numerical); (3) the simulation of (a possibly huge number of) embedded systems in close interaction (e.g., simulation of factories, electrical or sensor networks, train tracking). All these applications share the need for formally defined languages used both for simulation and the generation of target code. For that purpose, we design languages and experiment with compilers that transform mathematical specifications of systems into target code, that may execute on parallel (multi-core) architectures.
Our research team draws inspiration and focus from the simplicity and complementarity of the data-flow model of Kahn process networks [39] , synchronous concurrency [13] , and the expression of the two in functional languages [18] , [49] . To reach our goal, we plan to leverage a large body of formal principles: language design, semantics, type theory, concurrency models, synchronous circuits and algorithms (code generation, optimization, polyhedral compilation).
The activity of the project is in the field of formal methods and compilation techniques for the development of computing and communicating reactive applications.
The project addresses the design, semantics and implementation of programming languages together with compilation techniques to develop provably safe and efficient computing systems. Traditional applications can be found in safety critical embedded systems with hard real-time constraints such as avionics (e.g., fly-by-wire command), railways (e.g., on board control, engine control), nuclear plants (e.g., emergency control of the plant). While embedded applications have been centralized, they are now massively parallel and physically distributed (e.g., sensor networks, train tracking, distributed simulation of factories) and they integrate computationally intensive algorithms (e.g., video processing) with a mix of hard and soft real-time constraints. Finally, systems are heterogeneous with discrete devices communicating with physical ones (e.g., interface between analog and digital circuits). Programming and simulating a whole system from a unique source code, with static guarantees on the reproducibility of simulations together with a compiler to generate target embedded code is a scientific and industrial challenge of great importance.
The theoretical and practical interest of synchronous languages [12] is well established (Airbus A340 and A380 civil airplanes, EDF nuclear plants, railway signaling, system-on-chip for consumer electronics, etc.). There are also a variety of modeling/programming tools for the development of embedded systems (Simulink/StateFlow (http://www.mathworks.com/products/simulink ) by MathWorks, the academic tools Scilab/Scicos (http://www-rocq.inria.fr/scicos/ ) or Ptolemy II (http://ptolemy.berkeley.edu/ptolemyII/ )). These tools allow to program and simulate both the (discrete) controller and its physical (continuous) environment and are thus more widely applicable than synchronous languages have been. Nonetheless, they suffer from semantics issues [17] , the non-reproducibility of simulations [21] and inefficiencies in generated code, which precludes their use in the most critical software applications (e.g., civil avionics and railways) which are controlled by independent certification authorities. To remedy these problems and to apply synchronous languages to a wider range of applications, we believe that two main issues must be addressed:
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The ability to program and simulate, from a single source code both the system (e.g., the discrete controller) and its environment. The environment can be made of possibly huge numbers of other processes that are added and removed dynamically, and that possibly evolve in continuous time. This raises the question of the semantics and efficient simulation of the whole, the interaction with numerical solvers, and the static isolation of parts of the code which execute in bounded time and memory.
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The ability to generate efficient parallel code from a synchronous specification, targeting modern architectures including shared-memory multi-core processors, non-uniform or distributed memory many-core architectures, tiled processor arrays, and heterogeneous systems with hardware accelerators (like GPUs). This also raises the question of language annotations to describe architecture and behavioral (e.g., real-time) constraints while preserving modular composition. It requires language and compiler support for relaxed synchronous models with jittering or buffered communication.
Having these two objectives in mind, we adopt a language-centric approach, focusing our efforts on the development of languages together with dedicated type systems and compilation techniques. We insist on concrete implementations as they allow us to validate and experiment with our proposals. This experimental point of view can be related to the Ptolemy project of Edward Lee in Berkeley [16] . Our technical approach is distinguished, however, by a focus on the synchronous model and a preference for typed functional programming.
There is also the observation that the synchronous model is expressive enough to account for other concurrency models (e.g., discrete-event and continuous [41] , asynchronous communication [38] ). Basing our study on the data-flow synchronous model will make it easier to design a sound, common semantics for all the language features. It will also simplify the remaining test and verification steps; this approach has proved to be crucial for the industrial success of the synchronous languages. Finding efficient ways to perform the early simulation of mixed discrete-continuous programs is also essential in the design flow of today's embedded systems. The creation of such simulation tools and associated tools for parallel code generation is a central and distinguishing feature of our proposal.