Section: Partnerships and Cooperations

National Initiatives

Equipex FIT- Future Internet of Things

The FIT projet is a national equipex (equipement d'excellence), headed by the Lip6 laboratory. As a member of Inria, Socrate is in charge of the development of an Experimental Cognitive Radio platform that is used as test-bed for sdr terminals and cognitive radio experiments. This has been operational since 2014 and is maintained for a duration of 7 years. To give a quick view, the user will have a way to configure and program through Internet several sdr platforms (mimo , siso , and baseband processing nodes).

Insa-Spie IoT Chair

The Insa-Spie IoT Chair http://www.citi-lab.fr/chairs/iot-chair/ relies on the expertise of the CITI Lab. The skills developed within the different teams of the lab integrate the study, modelling, conception and evaluation of technologies for communicating objects and dedicated network architectures. It deals with network, telecom and software matters as well as societal issues such as privacy. The chair will also lean on the skills developed at INSA Lyon or in IMU LabEx.

Inria Project Lab: ZEP

The ZEP project addresses the issue of designing tiny computing objects with no battery by combining non-volatile memory (NVRAM), energy harvesting, micro-architecture innovations, compiler optimizations, and static analysis. The main application target is Internet of Things (IoT) where small communicating objects will be composed of this computing part associated to a low-power wake-up radio system. The ZEP project gathers four Inria teams that have a scientific background in architecture, compilation, operating system and low power together with the CEA Lialp and Lisan laboratories of CEA LETI & LIST. The major outcomes of the project will be a prototype harvesting board including NVRAM and the design of a new microprocessor associated with its optimizing compiler and operating system.

Figure 6. Example of system targeted by the ZEP project on the left, and on the right: the ZEP research program.
IMG/TPC-architecture.png IMG/overview-zep.png

The scientific work (in progress) is organized around three fields :

  • specific NVRAM-based architecture

  • dedicated compiler pass that computes a worst-case energy consumption

  • operating system managing NVRAM and energy, ensuring memory consistency across power outages

The project is illustrated by the figure 6, where PACAP, SOCRATE, CORSE, and CAIRN are the teams involved in the project.

Another important goal of the project is to structure the research and innovation that should occur within Inria to prepare the important technological shift brought by NVRAM technologies.

ANR - MetalibM

The goal of the Metalibm - “Automatic Generation of Function and Filters” (2014-2017, 200 keuros) project is to provide a tool for the automatic implementation of mathematical (libm) functions. A function f is automatically transformed into machine-proven C code implementing an polynomial approximation in a given domain with given accuracy. This project is led by Inria, with researchers from Socrate and AriC; PEQUAN team of Laboratoire d’Informatique de Paris 6 (LIP6) at Université Pierre et Marie Curie, Paris; DALI team from Université de Perpignan Via Domitia and Laboratoire d’Informatique, Robotique et Microélectronique de Montpellier (LIRMM); and SFT group from Centre Européen de Recherche Nucléaire (CERN).

ADT Sytare

The SYTARE project (Développement d'un SYsTème embArqué faible consommation à mémoiRE persistante - ADT Inria 2015-2017) aims to develop and study novel operating system mechanisms for NVRAM-based embedded systems. The term NVRAM collectively describes an emerging generation of memory technologies which are both non-volatile and byte-addressable. These two properties together make the classical RAM+ROM memory architecture obsolete, and enable the design of embedded systems running on intermittent power. This is very attractive in the context of energy-constrained scenarios, for instance systems harvesting their power from the environment. But working with NVRAM also poses novel challenges in terms of software programming. For instance, application state consistency must be guaranteed accross reboots, even though the system includes both NVRAM and volatile elements (e.g. CPU, hardware peripherals). The SYTARE project is funded by Inria via the ADT program.

ADT CorteXlab

The Socrate project-team is in charge of the FIT/CorteXlab platform (section 5.6). This platform (ADT Inria 2015-2017) makes use of many complex technologies from signal processing to computer science through micro-electornics and FPGA. The objectiv of the CorteXlab ADT is to maintain a support to the user of the FPGA-based platform of CorteXlab and to provide tutorial and running experiment that will help them in builing experimentation using the PicoSDR machines.

ANR - Ephyl

The general objective of the project EPHYL - “Enhanced PHY for Cellular Low Power Communication IoT” (2016-2019, 183 keuros) is to investigate coming and future LPWA technologies with the aim to improve coverage, data rate and connectivity while keeping similar level of complexity and power consumption at the node for the access. New waveforms enablers will be investigated and trialled in order to increase the efficiency of future systems and to provide efficient and fair access to the radio resource. The proposed new waveforms should comply with system constraints and with the coexistence of multiple communications.

ANR - Arburst

In this project Arburst - “Acheivable region of bursty wireless networks” (2016-2020, 195 KEuros), we propose an original approach complementary to other existing projects. Instead of proposing one specific technical solution, our objective is to define a unified theoretical framework devoted to the study of IoT networks fundamental limits. We aim at establishing the fundamental limits for a decentralized system in a bursty regime which includes short packets of information and impulsive interference regime. We are targeting the fundamental limits, their mathematical expression (according to the usual information theory framework capturing the capacity region by establishing a converse and achievability theorems). We will use the recent results relative to finite block-length information theory and we will evaluate the margin for improvement between existing approaches and these limits and we will identify the scientific breakthrough that may bring significant improvements for IoT/M2M communications. This project will contribute to draw the roadmap for the development of IoT/M2M networks and will constitute a unified framework to compare existing techniques, and to identify the breakthrough concepts that may afford the industry the leverage to deploy IoT/M2M technical solutions.